Renesas RA Family
RA2 Quick Design Guide
R01AN6060EU0100 Rev.1.00
Page 14 of 44
Sep.14.21
5.2.1 Requirements for USB Communications
The USB 2.0 Full-Speed Module (USBFS) requires a 48-MHz USB clock signal (UCLK).
For RA2 devices with a USBFS Module, the HOCO is the clock source for UCLK. Therefore, the HOCO must
be configured for 48-MHz operation when using the USBFS Module.
5.2.2 Requirements for Programming and Erasing ROM or Data Flash
For RA2A1, the FCLK must be at least 1 MHz to perform programming and erasing on internal ROM and
data flash.
For all other RA2 devices, the ICLK must be at least 1 MHz to perform programming and erasing on internal
ROM and data flash.
5.3 Lowering Clock Generation Circuit (CGC) Power Consumption
To aid in saving power, set the dividers for any unused clocks to the highest possible value whenever
possible. Also, if not using a clock then make sure that it has been stopped by setting the appropriate
register(s). The registers for controlling each clock source are shown in the table below.
Table 7. Clock Source Configuration Registers
Oscillator
Register
Description
Main clock
*1
MOSCCR
Starts/stops main clock oscillator
Sub-clock
*1
SOSCCR
Starts/stops sub-clock oscillator
High-speed on-chip (HOCO)
HOCOCR
Starts/stops HOCO
Middle-speed on-chip (MOCO)
MOCOCR
Starts/stops MOCO
Low-speed on-chip (LOCO)
LOCOCR
Starts/stops LOCO
Note 1: Not present on RA2E2 devices.
5.4 Writing the System Clock Control Registers
Care should be taken when writing to the individual bit fields in the System Clock Division Control Register
(SCKDIVCR) and System Clock Source Control Register (SCKSCR).
When the clock source of the peripheral module clock is switched, the duration of the peripheral module
clock cycle becomes longer during the clock source transition period. See Figure 8.
To ensure correct processing after the clock frequency changes, first write to the relevant Clock Control
register to change the frequency, then read the value from the register, and finally perform the subsequent
processing.
