R01UH0092EJ0110 Rev.1.10
Page 377 of 807
Jul 31, 2012
M16C/64C Group
20. Real-Time Clock
20.2.6
Real-Time Clock Control Register 2 (RTCCR2)
Write to the RTCCR2 register when bits TSTART and TCSTF in the RTCCR1 register are both 0 (count
stopped).
While bits RTCCMP1 to RTCCMP0 are 00b (no compare mode), an interrupt request can be generated
every second, minute, hour, day, or week. To generate an interrupt request, set one of the following bits
to 1 (interrupt enabled): SEIE, MNIE, HRIE, DAYIE, or WKIE. (Do not set more than one bit to 1.) Table
20.4 lists Periodic Interrupt Sources.
b7 b6 b5 b4
b1
b2
b3
Real-Time Clock Control Register 2
Symbol
RTCCR2
Address
0345h
Bit Symbol
RW
Reset Value
X000 0000b
b0
—
(b7)
—
Bit Name
RTCCMP0
RTCCMP1
RW
RW
Function
No register bit. If necessary, set to 0. The read value is undefined.
Compare mode select bit
b6 b5
0 0 : No compare mode
0 1 : Compare mode 1
1 0 : Compare mode 2
1 1 : Compare mode 3
SEIE
RW
Periodic interrupt triggered
every second enable bit
0 : Disable periodic interrupt triggered
every second
1 : Enable periodic interrupt triggered
every second
MNIE
RW
Periodic interrupt triggered
every minute enable bit
0 : Disable periodic interrupt triggered
every minute
1 : Enable periodic interrupt triggered
every minute
HRIE
RW
Periodic interrupt triggered
every hour enable bit
0 : Disable periodic interrupt triggered
every hour
1 : Enable periodic interrupt triggered
every hour
DYIE
RW
Periodic interrupt triggered
every day enable bit
0 : Disable periodic interrupt triggered
every day
1 : Enable periodic interrupt triggered
every day
WKIE
RW
Periodic interrupt triggered
every week enable bit
0 : Disable periodic interrupt triggered
every week
1 : Enable periodic interrupt triggered
every week
Содержание M16C Series
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