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12. Serial RapidIO Registers > IDT-Specific Performance Registers 352
Tsi576 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
12.9.10 RapidIO Port x Transmitter Output Queue Depth Threshold Register
Queue depth registers are designed to allow for the rapid detection and notification of congestion.
This register sets the Transmitter Queue Depth threshold, which is used in conjunction with “RapidIO
Port x Transmitter Output Queue Congestion Status Register” to monitor congestion on the output
buffers.
This register also sets the CONG_PERIOD, which is used in conjunction with the “RapidIO Port x
Transmitter Output Queue Congestion Period Register” to determine how long the output buffers have
been in a congestion state.
Register name: SP{0..15}_TX_Q_D_THRESH
Reset value: 0x0000_0000
Register offset: 13080, 13180, 13280, 13380, 13480,
13580, 13680, 13780, 13880, 13980, 13A80,
13B80, 13C80, 13D80, 13E80, 13F80
Bits 0 1 2 3 4 5 6 7
00:7 CONG_PERIOD
8:15 CONG_PERIOD
16:23 DEPTH Reserved LEAK_RT
24:31 LEAK_RT
Bits Name Description Type
Reset
Value
0:15 CONG_PERIOD This value is programmed by software to indicate the maximum
number of clock cycles that the output buffer can be in a
continuous congestion state. The congestion state is
determined based on the DEPTH and
“RapidIO Port x
Transmitter Output Queue Congestion Status Register” on
page 354
.
The programmed CONG_PERIOD value is then used as
follows:
0000 = CONG_PERIOD_CTR (in “RapidIO Port x Transmitter
Output Queue Congestion Period Register” on page 356 )
is disabled.
0001= For every clock cycle that the output buffer is in
continuous congestion state, increment the
CONG_PERIOD_CTR by 1. For example, for a 4x port
operating at 3.125 Gbaud/s, this is 3.2 ns.
FFFF = For every 64K clock cycles that the output buffer is in
continuous congestion state, increment the
CONG_PERIOD_CTR by 1. For example, for a 4x port
operating at 3.125 Gbaud/s, this is 209.7 us
R/W 0x0000