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13. I2C Registers > Register Descriptions 452
Tsi574 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
13.2.24 I
2
C New Event Register
This register indicates events that occurred since the last snapshot. This register is write-one-to-set.
Writing a 1 to a bit position will set the event for diagnostic purposes. The register is cleared by writing
to the I2C_EVENT register (see
“I
2
C Event and Event Snapshot Registers” ) or by creating a snapshot
by reading the “I
2
C Interrupt Status Register” . For individual event descriptions, see the I2C_EVENT
register.
Note: This register is affected by a reset controlled by the “I
2
C Reset Register” . All events will be
cleared and will not assert while SRESET is asserted in the “I
2
C Reset Register” .
Register name: I2C_NEW_EVENT
Reset value: 0x0000_0000
Register offset: 0x1D308
Bits 0 1 2 3 4 5 6 7
00:07 Reserved SDW SDR SD Reserved DTIMER DHIST DCMDD
08:15 IMBW OMBR Reserved SCOL STRTO SBTTO SSCLTO Reserved
16:23 Reserved MTD Reserved BLTO BLERR BLSZ BLNOD BLOK
24:31 Reserved MNACK MCOL MTRTO MBTTO MSCLTO MARBTO
Bits Name Description Type
Reset
Value
00 Reserved Reserved R 0
01 SDW Slave Internal Register Write Done Event
0 = Event not asserted
1 = Event asserted
R/W1S 0
02 SDR Slave Internal Register Read Done Event
0 = Event not asserted
1 = Event asserted
R/W1S 0
03 SD Slave Transaction Done Event
0 = Event not asserted
1 = Event asserted
R/W1S 0
04 Reserved Reserved R 0
05 DTIMER Diagnostic Timer Expired Event
0 = Event not asserted
1 = Event asserted
R/W1S 0
06 DHIST Diagnostic History Filling Event
0 = Event not asserted
1 = Event asserted
R/W1S 0