background image

Rev.4.00,  Feb.02.2004,  page 1 of 1

HD74UH04

Inverter

REJ03D0201–0400Z

(Previous ADE-205-016B (Z))

Rev.4.00

Feb.02.2004

Description

The HD74UH04 is high-speed CMOS inverter using silicon gate CMOS process.  With CMOS low power
dissipation, it provides high-speed equivalent to LS-TTL series.  The internal circuit of three stages
construction with buffer provides wide noise margin and stable output.

Features

 

Encapsulated in very small 5pins package of 2.9 

×

 1.6 

×

 1.1 mm, the efficiency to mount on substrate is

significantly improved.

 

The basic gate function is lined up as Renesas uni logic series.

 

Supplied on emboss taping for high-speed automatic mounting.

 

Electrical characteristics equivalent to the HD74HC04
Supply voltage range:  2 to 6 V
Operating temperature range:  –40 to +85°C

 

| I

OH

 | = I

OL

 = 2 mA (min)

 

Ordering Information

Part Name

Package Type

Package Code

Package
Abbreviation

Taping Abbreviation
(Quantity)

HD74UH04EL

MPAK-5 pin

MPAK-5V

EL (3,000 pcs/reel)

Содержание HD74UH04

Страница 1: ...and stable output Features Encapsulated in very small 5pins package of 2 9 1 6 1 1 mm the efficiency to mount on substrate is significantly improved The basic gate function is lined up as Renesas uni...

Страница 2: ...er Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage VCC 0 5 to 7 0 V Input voltage VIN 0 5 to VCC 0 5 V Output voltage VOUT 0 5 to VCC 0 5 V Input diode current IIK 20 mA Output diode...

Страница 3: ...C Ta 40 to 85 C tem Symbol VCC V Min Typ Max Min Max Unit Test Conditions 2 0 1 5 1 5 4 5 3 15 3 15 VIH 6 0 4 2 4 2 V 2 0 0 5 0 5 4 5 1 35 1 35 Input voltage VIL 6 0 1 8 1 8 V 2 0 1 9 2 0 1 9 4 5 4 4...

Страница 4: ...Min Typ Max Min Max Unit Test Conditions 2 0 50 125 155 4 5 14 25 31 Output rise fall time tTLH tTHL 6 0 12 21 26 ns See Test circuit 2 0 48 100 125 4 5 12 20 25 Propagation delay time tPLH tPHL 6 0 9...

Страница 5: ...2 2004 page 5 of 6 Test Circuit 50 CL Input Output VCC Pulse generator Note Operating current test time output is open Waveforms Input Output 90 50 10 tTHL tTLH 90 50 10 tPHL tPLH VCC GND VOH VOL 6 ns...

Страница 6: ...b 02 2004 page 6 of 6 Package Dimensions 0 16 0 0 1 0 95 0 6 5 0 4 2 9 0 2 1 9 0 2 1 6 2 8 0 2 0 3 0 2 0 1 0 1 0 05 0 95 0 6 0 1 0 05 1 1 0 3 0 2 0 1 Package Code JEDEC JEITA Mass reference value MPAK...

Страница 7: ...a total system before making a final decision on the applicability of the information and products Renesas Technology Corp assumes no responsibility for any damage liability or other loss resulting f...

Отзывы: