
IDT Configuration Registers
PES24T3G2 User Manual
8 - 22
February 22, 2012
Notes
PCIEDCTL - PCI Express Device Control (0x048)
27:26
CSPLS
RO
0x0
Captured Slot Power Limit Scale. This field specifies the scale
used for the Slot Power Limit Value.
The value of this field is set by a Set_Slot_Power_Limit Message
and is only applicable for the upstream port. This field is always
zero in downstream ports.
0 - (v1) 1.0x
1 - (v1p1) 0.1x
2 - (v0p01) 0.01x
3 - (v0p001x) 0.001x
31:28
Reserved
RO
0x0
Reserved field.
Bit
Field
Field
Name
Type
Default
Value
Description
0
CEREN
RW
0x0
Correctable Error Reporting Enable. This bit controls reporting
of correctable errors.
1
NFEREN
RW
0x0
Non-Fatal Error Reporting Enable. This bit controls reporting of
non-fatal errors.
2
FEREN
RW
0x0
Fatal Error Reporting Enable. This bit controls reporting of fatal
errors.
3
URREN
RW
0x0
Unsupported Request Reporting Enable. This bit controls
reporting of unsupported requests.
4
ERO
RO
0x0
Enable Relaxed Ordering. When set, this bit enables relaxed
ordering. This bit is not applicable to the switch, since the switch
never sets the relaxed ordering bit in transactions it initiates as a
requester. Therefore, this bit is hardwired to 0x0.
7:5
MPS
RW
0x0
Max Payload Size. This field sets maximum TLP payload size for
the device.
This field should be set to a value less than that advertised by the
Maximum Payload Size Supported (MPAYLOAD) field in the PCI
Express Device Capabilities (PCIEDCAP) register. Setting this
field to a value larger than that advertised in the MPAYLOAD field
produces undefined results.
0x0 - (s128) 128 bytes max payload size
0x1 - (s256) 256 bytes max payload size
0x2 - (s512) 512 bytes max payload size
0x3 - (s1024) 1024 bytes max payload size
0x4 - (s2048) 2048 bytes max payload size
0x5 - (s4096) 4096 bytes max payload size
0x6 - reserved (treated as 128 bytes)
0x7 - reserved (treated as 128 bytes)
8
ETFEN
RW
0x0
Extended Tag Field Enable. Since the bridge never generates a
transaction that requires a completion, this bit has no functional
effect on the device during normal operation.
To aid in debug, when the SEQTAG field is set in the TLCTL reg-
ister, this field controls whether tags are generated in the range
from 0 through 31 or from 0 through 255.
Bit
Field
Field
Name
Type
Default
Value
Description
Содержание 89HPES24T3G2ZBAL
Страница 8: ...IDT PES24T3G2 User Manual 6 February 22 2012 Notes...
Страница 12: ...IDT Table of Contents PES24T3G2 User Manual iv February 22 2012 Notes...
Страница 14: ...IDT List of Tables PES24T3G2 User Manual vi February 22 2012 Notes...
Страница 16: ...IDT List of Figures PES24T3G2 User Manual viii February 22 2012 Notes...
Страница 20: ...IDT Register List PES24T3G2 User Manual xii February 22 2012 Notes...
Страница 32: ...IDT PES24T3G2 Device Overview PES24T3G2 User Manual 1 12 February 22 2012 Notes...
Страница 72: ...IDT SMBus Interfaces PES24T3G2 User Manual 5 20 February 22 2012 Notes...
Страница 76: ...IDT Power Management PES24T3G2 User Manual 6 4 February 22 2012 Notes...
Страница 156: ...IDT Configuration Registers PES24T3G2 User Manual 8 74 February 22 2012 Notes...