Mega
Plus
®
Model 1.4i
4.9.3 Line Enable
This is the Horizontal Sync for the camera. This signal runs continuously to allow external
equipment to “phase lock” with the camera if desired. It is not affected by the camera mode or by
any state the camera may be in (idle, exposing, or transferring).
When LINE ENABLE is low, all lines in the sensor are shifted upward in parallel one line. The top
line is shifted into the horizontal output shift register.
When LINE ENABLE is high, the information in that horizontal shift register is clocked serially to
the camera’s output circuits.
Image data is valid only when both FRAME ENABLE and LINE ENABLE are high, the rest of the
time the data are meaningless.
Figure 4-11. Line Timing Waveform
4.9.4 Pixel Timing
PIXEL DATA STROBE is a 10 MHz square wave that runs continuously. This clock drives the
circuitry that identifies pixels, counts lines, and synchronizes the internal states of the camera.
Valid digital data should be sampled at the rising edge of PIX DAT STRB (+).
Figure 4-12. Pixel Clock Timing
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USER’S MANUAL
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