R&S SMJ100A, Руководство по эксплуатации, Страница: 332 / 874

Instrument Function
R&S
®
SMJ100A
316 Operating Manual 1403.7458.32 ─ 14
In the case of modulation modes with more than 1bit/symbol, the most significant bit
(MSB) must be fed in first (MSB first).
The clock reference (symbol clock) used to read in the data can be either internal or
external.
External serial data is output on the PARDATA pins of the AUX I/O interface as parallel
data LSB-justified.
The maximum data rate for serial data processing can be found in the data sheet.
External Parallel Modulation Data via the AUX I/O Interface
For "Custom Digital Modulation", parallel data can be supplied symbol-by-symbol via
the AUX I/O interface (D0 – D9). The "Data Source" selection from the menu is "Extern
Parallel".
In the case of modulation modes with fewer than 10bits/symbol, the data must be
applied LSB-justified. In the case of 8-PSK modulation for example (3bits/symbol) only
data lines D0, D1 and D2 are used.
The clock reference (symbol clock) used to read in the data can be either internal or
external.
External parallel data is output on the DATA connector serially. However, there is a
maximum data rate above which serial data processing becomes impossible and the
DATA connector becomes high-impedance. The maximum data rate for parallel data
processing is shown in the data sheet.
5.8.1.4 Clock Signals
The clock reference used for generating the timing pulse can be either internal or
external ("Clock Source" selection from the menu: "Internal / External").
Internal clock reference
The table below gives an overview of the generated clock signals and the connectors
they are output at for the case a internal clock reference is selected.
Connector Location Clock Mode
CLOCK front panel Symbol clock
CLOCK OUT rear panel Choice of bit clock or symbol
clock
BITCLK AUX I/O interface, rear panel Bit clock
SYMBCLK AUX I/O interface, rear panel Symbol clock
Baseband Signal - Baseband Block