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WCDMA Generator
R&S
®
CMW-KG4xx/-KM4xx/-KS4xx
922
User Manual 1173.9657.02 ─ 11
The Node B transmits a series of Transmit Power Control (TPC) commands on the DL
DPCH. The UE receives the TPC commands and adjusts its transmit power according
to one of the following algorithms for uplink power control (see 3GPP TS 25.214):
●
Algorithm 1:
One TPC command is received in each slot. If the received TPC command is equal
to 1 (0), then the power control parameter TPC_cmd for that slot is +1 (–1). This
implies that the UE transmitter output power changes after each slot.
●
Algorithm 2:
One TPC command is received in each slot. The slots are grouped into sets of 5
slots, aligned to the frame boundaries, so that there is no overlap between different
sets of 5 slots.
If the received TPC command is equal to 1 (0) in all 5 slots of a set, then the power
control parameter TPC_cmd for the 5
th
slot is +1 (–1). Otherwise TPC_cmd for the
5
th
slot is 0. This implies that the UE transmitter output power only changes if the
same TPC command is received in a complete set of 5 slots.
For both algorithms, the UE transmitter output power changes by TPC_cmd multiplied
with the TPC step size of 1 dB or 2 dB. According to 3GPP, the TPC step size for Algo-
rithm 2 is always 1 dB. The step size for Algorithm 1 can be 1 dB or 2 dB.
6.2.8.1
TPC Pattern Setups
The R&S
CMW provides several predefined setups with different TPC patterns. Some
of these setups are fixed, some can be modified according to the needs of a specific
application. The UE power resulting from a TPC pattern sent to the UE can be mea-
sured using the "WCDMA measurement" firmware application (option R&S CMW-
KM400).
The following table provides an overview of the predefined setups. <Pattern> refers to
a user-definable bit sequence.
Pattern Setup Name
Transferred Pattern
Alternating
(1)010101010...
The first bit of the pattern is different from the last bit transferred before
the start of the pattern.
All 1
1111111111...
All 0
0000000000...
Single P Alternating
<Pattern>(0)101010101...
The first bit after <Pattern> is different from the last bit in <Pattern>
Single P All 1
<Pattern>1111111111...
Single P All 0
<Pattern>0000000000...
Continuous Pattern
<Pattern><Pattern><Pattern><Pattern>...
TPC Test Step...
TPC Test Steps for Inner Loop Power Control
General Description
深圳德标仪器
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