Rabbit Rabbit 4000, Руководство пользователя

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280 Rabbit 4000 Microprocessor User’s Manual
26.3 Register Descriptions
Global Control/Status Register (GCSR) (Address = 0x0000)
Bit(s) Value Description
7:6 00 No reset or watchdog timer timeout since the last read.
(rd-only) 01 The watchdog timer timed out. These bits are cleared by a read of this register.
10 This bit combination is not possible.
11 Reset occurred. These bits are cleared by a read of this register.
5 0 No effect on the periodic interrupt. This bit will always be read as zero.
1 Force a periodic interrupt to be pending.
4:2 000
Processor clock from the fast clock, divided by 8.
Peripheral clock from the fast clock, divided by 8.
001
Processor clock from the fast clock, divided by 8.
Peripheral clock from the fats clock.
010
Processor clock from the fast clock.
Peripheral clock from the fast clock.
011
Processor clock from the fast clock, divided by 2.
Peripheral clock from the fast clock, divided by 2.
100
Processor clock from the 32 kHz clock, optionally divided via GPSCR.
Peripheral clock from the 32 kHz clock, optionally divided via GPSCR.
101
Processor clock from the 32 kHz clock, optionally divided via GPSCR.
Peripheral clock from the 32 kHz clock, optionally divided via GPSCR.
The fast clock is disabled.
110
Processor clock from the fast clock, divided by 4.
Peripheral clock from the fast clock, divided by 4.
111
Processor clock from the fast clock, divided by 6.
Peripheral clock from the fast clock, divided by 6.
1:0 00 Periodic interrupts are disabled.
01 Periodic interrupts use Interrupt Priority 1.
10 Periodic interrupts use Interrupt Priority 2.
11 Periodic interrupts use Interrupt Priority 3.