Smart Module Series
SC606T Series Hardware Design
SC606T_Series_Hardware_Design 64 / 116
traces. For the same group of DSI or CSI signals, the length of all MIPI traces should be kept the
same. In order to avoid crosstalk, keep the intra-lane spacing as wide as the MIPI trace and the
inter-lane spacing two times the MIPI trace width. Avoid any cut or hole on the GND reference plane
under MIPI signal traces.
⚫
It is recommended to select a low capacitance TVS for ESD protection and the recommended
parasitic capacitance is below 1 pF.
⚫
Route MIPI traces according to the following rules:
a) The total trace length should not exceed 305 mm;
b) Keep the differential impedance at 100
Ω ±10 %;
c) Control the intra-lane length difference within 0.67 mm;
d) Control the inter-lane length difference within 1.3 mm.
Table 22: MIPI Trace Length Inside the Module
Pin Name
Pin No.
Length (mm)
Length Difference (mm)
DSI0_CLK_N
116
20.82
-0.45
DSI0_CLK_P
115
20.37
DSI0_LN0_N
118
24.84
0
DSI0_LN0_P
117
24.84
DSI0_LN1_N
120
24.85
-0.03
DSI0_LN1_P
119
24.82
DSI0_LN2_N
122
25.94
0.24
DSI0_LN2_P
121
26.18
DSI0_LN3_N
124
29.31
0.2
DSI0_LN3_P
123
29.51
DSI1_CLK_N
103
9.52
-0.05
DSI1_CLK_P
102
9.47
DSI1_LN0_N
105
10.27
-0.11
DSI1_LN0_P
104
10.16
DSI1_LN1_N
107
11.75
-0.17
DSI1_LN1_P
106
11.58