Smart LTE Module Series
Smart EVB User Guide
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3.7.2. Headphone Interface
The following figure shows the reference circuit design for headphone interface.
20K
ESD
MIC_GND
MIC2_P
HPH_L
HS_DET
HPH_R
HPH_REF
33pF
Module
R1
0R
6
3
4
5
2
1
33pF 33pF
C3
C4
C5
F3
F2
F1
D1 D2 D3 D4
F4
R2
R3
0R
R5
0R
F5
0R
33R
33R
C1
C2
NM
NM
R6
R4
R7 R8
10K10K
C6
100pF
Figure 18: Reference Circuit Design for Headphone Interface
The following figure shows the pin assignment of headphone interface.
1
2
3
4
5
6
Figure 19: Pin Assignment of Headphone Interface