PAC25140 Users Guide Preview
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Rev. 1.0.0 28 February 2023 © 2023 Qorvo US, Inc.
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disable the DSG gate driver via the SOC.PROTEN.BATOVDCPPROTEN bit.
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Interrupt the MCU via the nIRQ2 signal connected to the PB7 GPIO signal if the
SOC.SIGFAULTEN.BATOVCPROTEN bit is set.
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Interrupt the MCU via the nIRQ2 signal connected to the PB7 GPIO signal if the
SOC.SIGFAULTEN.BATOVDPROTEN bit is set.
The BATOV DAC value can be set by writing the SOC.BATOVDAC register. The BATOV
comparator is enabled by setting the SOC.SIGMGRCTL1.BATOVEN bit. The BATOV
comparator blanking time and hysteresis can be configured by writing the SOC.BATOVCFG
register. Once the BATOV DAC value is exceeded at the BATOV Comparator input, an Over
Voltage event will be registered and the SOC.SIGFAULT.BATOVFAULT flag will be set. The
SOC.SIGFAULT.BATOVFAULT flag is cleared by writing a 1d.
Battery over voltage protection comparator output can be polled in real time by reading the
SOC.BATRTS.BATOV_RTS bit.
7.4.9 Voltage Sensing
The PAC25140 also contains a 16-bit Sigma-Delta ADC that may be used for voltage sensing
for the individual cells. There is a MUX that selects each of the individual cell balance nodes
(VB1 to VB20) so that they may be sampled by the 16-bit ADC.
The SOC bus is used for the MUX select as well as the ADC operation and fetching of the 16-bit
result from the MCU.
7.4.10 Measuring Independent Cell Voltages
The cell voltage ADC (VADC) is enabled by setting the SOC.SIGMGRCTL2.VADCEN bit. Cells
for which voltage ADC capturing will be performed, must also be enabled by setting their
respective enable bit. This can be accomplished by writing to the SOC.CELLEN1.CENx,
SOC.CELLEN2.CENx and SOC.CELLEN3.CENx registers. Cells which are not enabled will be
removed from the ADC path and can't be digitized.
In order to measure each independent voltage, the VADC multiplexer must be configured to
select the cell which will be connected into the VADC converter. The VBMUXSEL value can be
configured by writing a number from 0d to 19d to the SOC.VADCTL.VBMUX register.
Alternatively, the same multiplexer allows the voltage conversion of the Battery Over Voltage
DAC by selecting multiplexer entry 20d.
To start a VADC Conversion, the SOC.VADCCTL.ADCSTART bit must be set to 1d. The read
only bit SOC.VADCCTL.VADCBUSY bit will set to 1d once the conversion is completed. The
IADCBUSY bit signal is also routed to the MCU PA3 GPIO, which can be configured to
generate an interrupt based on the IADCBUSY signal. The 16 bit Cell Voltage conversion can
be obtained by reading the SOC.VADCRESHI and SOC.VADCRESLO registers.