28
Figure 23 shows the use of an analog multiplexer 4053 to separate the programmer from the peripherals
connected to microcontroller ports.
AD7
J1_1
AD6
J1_2
AD5
J1_3
AD4
J1_4
AD3
J1_5
AD2
J1_6
AD1
J1_7
AD0
J1_8
A1
J1_9
A0
J1_10
#SEL2
J1_11
#SEL1
J1_12
PE7
J1_13
PE6
J1_14
PE5
J1_15
PE4
J1_16
PE3
J1_17
PE2
J1_18
PE1
J1_19
PE0
J1_20
ADC7
J1_21
ADC6
J1_22
ADC5
J1_23
ADC4
J1_24
ADC3
J1_25
ADC2
J1_26
ADC1
J1_27
ADC0
J1_28
AREF
J1_29
AGND
J1_30
A+5V
J1_31
AGND
J1_32
+5V
J2_1
GND
J2_2
+3.3V
J2_3
GND
J2_4
Vbat
J2_5
GND
J2_6
TPIN+
J2_7
TPIN-
J2_8
TPOUT+
J2_9
TPOUT-
J2_10
LED_LINK
J2_11
LED_ACTIV
J2_12
#RESET
J2_13
LED_DF
J2_14
#WR
J2_15
#RD
J2_16
PD7
J2_17
PD6
J2_18
PD5
J2_19
PD4
J2_20
PD3
J2_21
PD2
J2_22
PD1
J2_23
PD0
J2_24
PB7
J2_25
PB6
J2_26
PB5
J2_27
PB4
J2_28
PB3
J2_29
PB2
J2_30
PB1
J2_31
PB0
J2_32
MMnet102 module
+5V
+3.3V
GND
GND
GND
1
2
3
4
5
6
7
8
9
10
ISP
GND
GND
GND
GND
+5V
MISO
SCK
RST
LED
MOSI
ISP
1k
+5V
Figure 22
Connecting the MMnet102 module with an ISP connector.
AD7
J1_1
AD6
J1_2
AD5
J1_3
AD4
J1_4
AD3
J1_5
AD2
J1_6
AD1
J1_7
AD0
J1_8
A1
J1_9
A0
J1_10
#SEL2
J1_11
#SEL1
J1_12
PE7
J1_13
PE6
J1_14
PE5
J1_15
PE4
J1_16
PE3
J1_17
PE2
J1_18
PE1
J1_19
PE0
J1_20
ADC7
J1_21
ADC6
J1_22
ADC5
J1_23
ADC4
J1_24
ADC3
J1_25
ADC2
J1_26
ADC1
J1_27
ADC0
J1_28
AREF
J1_29
AGND
J1_30
A+5V
J1_31
AGND
J1_32
+5V
J2_1
GND
J2_2
+3.3V
J2_3
GND
J2_4
Vbat
J2_5
GND
J2_6
TPIN+
J2_7
TPIN-
J2_8
TPOUT+
J2_9
TPOUT-
J2_10
LED_LINK
J2_11
LED_ACTIV
J2_12
#RESET
J2_13
LED_DF
J2_14
#WR
J2_15
#RD
J2_16
PD7
J2_17
PD6
J2_18
PD5
J2_19
PD4
J2_20
PD3
J2_21
PD2
J2_22
PD1
J2_23
PD0
J2_24
PB7
J2_25
PB6
J2_26
PB5
J2_27
PB4
J2_28
PB3
J2_29
PB2
J2_30
PB1
J2_31
PB0
J2_32
MMnet102 module
+5V
+3.3V
GND
GND
GND
1
2
3
4
5
6
7
8
9
10
ISP
#RESET
GND
GND
GND
GND
+5V
X0
12
X1
13
Y0
2
Y1
1
Z0
5
Z1
3
INH
6
A
11
B
10
C
9
X
14
Y
15
Z
4
VDD
16
VSS
8
VEE
7
4053
PE1
PB1
PE0
GND
+5V
GND
GND
ISP
+5V
1k
MISO
SCK
RST
LED
MOSI
#RESET
Figure 23
Connection of the MMnet102 module with an ISP connector using a multiplexer.