Pioneer PDP-501MX, Руководство по обслуживанию

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PDP-501MX, PDP-V501X
69
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin Name
TEST1/AP
TEST2/SP
RE1
VSS 1
VDD 1
YUV C7
YUV C6
YUV C5
YUV C4
YUV C3
VSS 2
VDD 2
YUV C2
YUV C1
YUV C0
YUV C11
YUV C10
YUV C9
YUV C8
CK
VSS 3
VDD 3
WE2
RE2
YUV B8
YUV B9
YUV B10
YUV B11
YUV B0
YUV B1
YUV B2
YUV B3
VDD 4
VSS 4
YUV B4
YUV B5
YUV B6
YUV B7
RE
VD
HD
YUV D8
YUV D9
YUV D10
VDD 5
VSS 5
YUV D11
YUV D0
YUV D1
YUV D2
TYPE
I
I
O
G
S
O
O
O
O
O
G
S
O
O
O
O
O
O
O
I
G
S
O
O
I
I
I
I
I
I
I
I
S
G
I
I
I
I
I
I
I
O
O
O
S
G
O
O
O
O
Pin Function
Action pin for testing to be connected to Vss
Shift pin for testing to be connected to Vss
Read enable to FM1
Ground 1
Supply voltage 1
Y bit 7 to FM2
Y bit 6 to FM2
Y bit 5 to FM2
Y bit 4 to FM2
Y bit 3 to FM2
Ground 2
Supply voltage 2
Y bit 2 to FM2
Y bit 1 to FM2
Y bit 0 to FM2
UV bit 3 to FM2
UV bit 2 to FM2
UV bit 1 to FM2
UV bit 0 to FM2
Master clock,nominal 27 or 32 MHz
Ground 3
Supply voltage 3
Write enable to FM2
Read enable to FM2
UV bit 0 from FM2
UV bit 1 from FM2
UV bit 2 from FM2
UV bit 3 from FM2
Y bit 0 from FM2
Y bit 1 from FM2
Y bit 2 from FM2
Y bit 3 from FM2
Supply voltage 4
Ground 4
Y bit 4 from FM2
Y bit 5 from FM2
Y bit 6 from FM2
Y bit 7 from FM2
Master read enable
Field frequent reset, vertical display
Horizontal reference signal
UV bit 0
UV bit 1
UV bit 2
Supply voltage 5
Ground 5
UV bit 3
Y bit 0
Y bit 1
Y bit 2
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Pin Function