DEH-P75BT/XN/EW5
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6.6 SYSTEM MICROCOMPUTER TEST PROGRAM
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PCL Output
In the normal operation mode (with the detachable panel installed, the ACC switched ON, the standby mode
cancelled), shift the STEST IC601(Pin 86) terminal to H.
The clock signal is output from the PCL1 terminal IC601(Pin 41).
The frequency of the clock signal is 625.000 kHz that is one 32th of the fundamental frequency.
The clock signal should be 625.000 kHz(- 25 Hz, + 25 Hz).
If the clock signal is out of the range, the X'tal (X601) should be replaced with new one.
Содержание P8880BT/BR
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