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Circuit-, IC descriptions and list of abbreviations

EN 132

LX9000R

Circuit-, IC descriptions and list of abbreviations

9.1

Front Boards

9.1.1

Microcontroller

The core element of the Display Control unit is the
microcontroller TMP88W74F [7406]. The TMP88W74F is an 8
bit microcontroller fitted with 96kB ROM and 2kB RAM. It
requires 5V supply and is responsible for the following
functions:
–

Interface to Central Controller-P

–

Evaluation of the keyboard matrix

–

Decoding the remote control commands from the infra-red
receiver

–

Activation and control of the local display

The 12 MHz resonator (Pos. 1409) generates the system clock.
The reset is generated by transistor 7409.

9.1.2

Interface to the Central Control

The communication to the main microcontroller (CC) on the P-
Sub-PCB is done via I2C-Interface, where the TMP88W74F
acts in slave-mode.
An additional wire (“INT”-line) is used to signal the Central
controller that data are ready, e.g. when a key has been
pressed.

9.1.3

Evaluation of the keyboard matrix

There are 8 different keys on the Front boards. A resistor
network is used to generate a specific direct voltage value,
depending on the pressed key. Via the resistors 3439 and 3440
on the analog/digital (A/D) ports (7406 pin 36 and 37) the
evaluation is done.

9.1.4

IR receiver and signal evaluation

The IR receiver [7401] contains a selectively controlled
amplifier as well as a photo-diode. The photo-diode changes
the received infra red transmission (approx. 940nm) to
electrical pulses, which are then amplified and demodulated.
On the output of the IR receiver, a pulse sequence with TTL-
level, which corresponds to the envelope curve of the received
IR remote control command, can be measured. This pulse
sequence is fed into the controller for further processing via
port TC1 [7406, pin20].

9.1.5

LCD

The LCD is a complete module containing the display and its
driver circuitry. The module is controlled by the front

P via I

C-

interface.

9.2

Microcontroller Sub Board (UP SUB Board)

9.2.1

General

This small PCB is directly soldered in on top of the Analogue-
Board.
It is used with no diversity in all three different basic versions
(Europe, NAFTA and APAC-Pal). Only the software being
loaded into the external Flash-memory is not the same.

9.2.2

Microcontroller

The main part of the Sub-PCB is the central controller (CC)

[7804] TMP91CW12AF, which is a 16-bit CPU with 128kBROM
and 4kB RAM.

It works with a 3V3 supply and a system clock of 24,576MHz
[1801].
The 3V3-supply is made out of the “5VSTBY” by the circuit
around [7816].
After connecting the set to the mains (power-up) the IC [7806]
generates a reset pulse. This signal (“IPOR”) is directly fed to
first priority interrupt input (pin 63) for power fail detection and
also to the Reset-Input of the CC (Pin30) via [7802], which is
necessary to generate a reset only during power-up. In case of
power fail pin 30 of the CC must be kept high (3V3).
The internal memory of the CC is too small for all necessary
demands. Therefore an external Flash-ROM [7805] with
1MByte in size and a RAM [7803] with 128kByte are
necessary. Both parts are connected to the

P via a parallel

address-/data-bus. The lower eight bus-lines (AD0 to AD7) are
multiplexed by [7801] and the “ALE”-signal of the CC.
For updating of the software the external Flash-ROM can be
reprogrammed by the

P. During this process [7807] is

switched on by the “WE”-signal.
When no mains is connected, the CC is supplied via Gold-Cap
[2816] during the power backup period. The diode [6802]
prevents unwanted current consumption of other components.
The internal ROM of the

P holds the program code for the

Real-Time-Clock. Only the microprocessor is supplied by the
backup cell, not the external memories and the

P operates in

a low frequency mode with the clock crystal [1805] only (32.768
kHz). To adjust the clock the frequency can be measured at pin
87 of the

P in a special test-mode.

9.2.3

Control-Interfaces

The CC is communicating with the digital board via a serial
connection, which operates at a speed of 19,4 kbit/s
(“D_DATA”-, “A_DATA”, “D_RDY”- and “A_RDY”-signal on
[1986]). By generating a high level on pin 16 of the CC the
digital PCB can be reset (inverter [7817] in between).
Most of the other parts are controlled by the

P via I2C-bus

(“SDA”- and “SCL”-signal). The FETs [7821] and [7822] are
used for adaptation of the 3V3-level on CC-side to the
components supplied with 5V.
The CC can also reset the display-board-

P by pulling pin 39

to high.
The transistor [7819] acts as a level shifter for the “INT”-signal.
In the European sets a bi-directional interface is established
between the recording unit and the TV device at pin 10 of the
Scart (“P50”-line/Easy Link). The processing is done via pin 14
(output) and pin 38 (input) of the CC and the circuit around
[7813], [7814] and [7815].

9.2.4

EEPROM

The EEPROM M24C16 [7808] is an electrical erasable and
programmable, non-volatile memory. The EEPROM stores
data specific to the device, such as the AFC-reference value of
the Europe IF-part, the clock-correction-factor, etc. It is
accessed by the

P via the I2C-bus.

9.2.5

Sync Separator

To detect whether a video signal is available or not a separate
IC [7825] is used to extract the sync information out of the video
signal that is also routed to the digital board for recording.
While on the input a low-pass-filter ([2823] and [3869]) limits
the bandwidth an additional filter (circuit
around [7818]) on the output avoids distortions. Afterwards the
sync-signal is routed to pin11 of the CC.