Block Diagrams, Test Point Overviews, and Waveforms
27
6.
Block Diagram IBO Zapper
K6
FRONT END
IBO - ZAPPER PANEL (DVB)
K2
FLA
S
H MEMORY
K
3
POWER
S
UPPLY
K5
ANALOG BACK END
K1
MOJO
K7
COMMON INTERFACE
K4
INTERFACE
11
9
1600
TD1
3
16L
7600
TDA10046HT
TUNER
COFDM
CHANNEL
DECODER
15
2
3
1
14
61
62
IF1
9
RE
S
ET_FE-N
IF2
2
IF-AGC
1
21
4
3
AGC-TUN
COMB-OUT
RF-IN
I2C_TDA_
S
DA
I2C_TDA_
S
CL
I2C_LOCAL_
S
DA
I2C_LOCAL_
S
CL
d
s
p_EEPROM_WP
+5VCle
a
n
K7
B2B
K6
K1
K1
K1
K1
K7
K7
EF
7402
5511
7512
7507
S
PDIF
OUT
R1
L1
CVB
S
_VCR
GREEN/Y
BLUE/U
RED/V
I2C_TV_
S
DA
I2C_TV_
S
CL
AUDIO
DAC
FILTER
O
S
C
27MHz
7502
UDA1
33
4AT
S
7100
PNX
83
16H
S
7700
S
TV0700
16
14
TV_IRQ
+12V
+12V
+5V
CLEAN
1
3
01
1
2
TO X220
OR 1M10
P
S
U
S
PDIF
MOJO_I2
S
_OUT_
S
D
C_CVB
S
G/Y
B/P
b
R/Pr
TV_IRQ
7704
FXO-
3
1FT
MOJO_I2
S
_OUT_
S
CK
MOJO_I2
S
_OUT_W
S
3
1
2
MOJO
AV
GPIO
UC
S
G
MIU
S
DRAM
I2C
PCMCIA
CONTROLLER
T
S
INTER
FACE
COFMD
T
S
IN
T
S
IN
T
S
OUT
RXDO
TXDO
T
S
_DATA (0-7)
T
S
_CLK
T
S
_
S
YNC
T
S
_VALID
I2C_LOCAL_
S
DA
us
er_EEPROM_WP
I2C_LOCAL_
S
CL
TDA_CLK
TDA_VALID
TDA_
S
YNC
UNCOR
INTERRUPT
MANAGEMENT
ICC
INTERFACE
I2C_LOCAL_
S
CL
3
1
3
5
CURRENT
S
WITCH
7705
S
T
8
90C
12
I2C_LOCAL_
S
DA
3
0
PCMCIA_5V
FAULT
VCCEN
3
S
YNC
DRAM
4x2Mx16
7202
K4
S
2
8
16
3
2F
720
3
M24C64
EEPROM
8
KX
8
NOR
FLA
S
H
(option
a
l)
7201
M5
8
LWO
3
2A
EPROM
NOR
FLA
S
H
7200
M29W
3
20DT
+5V
5
6
7
MIU BU
S
MIU_ADDR (15-24)
MIU_ADDR (0-7)
PCMCIA-A (0-7)
CONTROL
CONTROL LINE
S
A_MD (0-7) + A_MDO (0-7)
LATCH
7701
74LVC57
3
ADB
6
8
P
PCMCIA
CONN
MIU_ADDR (
8
-14)
PCMCIA-A (
8
-14)
CONTROL
LATCH
7702
74LVC57
3
ADB
CONTROL
BU
S
TRAN
S
CEIVER
770
3
74LVC245A
1
3
4
3
5
6
8
FROM
MAIN TUNER
LC4.X
OR
JL2.1
38
3
7
3
6
3
5
33
FE_LOCK
25
8
10
5
1
3
AG
C
XT
AL
8
6
8
6
4
54
X-IN
+5V
+5V
+5V
5
6
7
7602
M24C256
EEPROM
INVERTER
4
2
2
4MHz_MOJO
INVERTER
7606
74AHC1GU04GW
7605
74AHC1GU04GW
K1 K2
+5V
+
3
V
3
+12V_A
+1V
8
FE
+1V2_MOJO
6
3
04
7
3
05
MC
3
406
3
AP1
S
UPPLY
CONTROL
7
3
06
NCP
3
0
3
L
S
N
3
0
POWER
ON
RE
S
ET
1
2
6
3
0
3
7
3
0
3
MC
3
406
3
AP1
S
UPPLY
2
6
1
8
0
+
3
V
3
5
3
02
6
3
00
2
3
11
7
3
09
7
3
10
+
3
V
3
CLEAN
F_15660_006.ep
s
260106
RE
S
ET_n
MPEG
K7
K7
5
3
09
3
5511
FILTER
551
3
FILTER
5514
FILTER
7506
7505
5512
FILTER
7514
7510
7500
7501
750
3
7504
1500
1402
1
2
3
UART
CONN.
FOR
COMPAIR
ONLY
140
3
1
2
3
4
U
S
B_D+
U
S
B_D-
VBU
S
U
S
B
CONNECTOR
(Re
s
erved)
740
3
LM
3
525
U
S
B_OVRCUR
U
S
B_PWR
6,
8
2
1
7
+5V_U
S
B
Power
S
witch
a
nd
Over-c
u
rrent
Protection
3
420
3
421
U
S
B_DP
U
S
B_DM
5
3
01
7
3
00
MC
3
406
3
AP1
S
UPPLY
2
6
7
3
11
7
3
0
8
LD1117V50
IN OUT
COM
7
3
01
LD1117V1
8
IN OUT
COM
5
3
0
3
5
3
04
5
3
00
5
3
07
7
3
07
LD1117V50
IN OUT
COM
5
3
06
5
3
05
TO 1G0
3
LC4.x (EUR)
OR 1R01
LC4.x (AP/U
S
)
OR 1I11
FTx2.x
B15
3
207
3
206
3
211
3
209
3
210
3
700
3
701
3
607
3
606
3
626
3
627
3
612
3
6
33
3
6
3
4
5602
3
6
3
0
3
6
3
1
3
625
3
629
7601-1
LM
3
9
3
D
3
2
1
14
10
12
8
6
4
S
DRAM_ADDR
S
DRAM_DATA
200
201
199
19
8
6
7
202
20
3
204
172
165
16
3
167
I2C
AV
9
8
GPIO
206
15
14
29
3
0
2
8
3
1
3
5
3
1
3
4
3
1
33
1
8
5
GPIO
50
4
8
49
6
3
62
61
1401
1
3
04
F500mA
2
6
MOJO_
S
Y
S
CLK
6
205
3
164
TDA_DAT (0-7)
B1
3
A
B14H
FE_LOCK
3
4
K6
1700
MIU_ADDR
MIU_DATA
B2
3
PCMCIA-D (0-7)
MIU_DATA (0-7)