3-1
IC BLOCK DIAGRAMS
CV
HDS1
A18
A17
DVSS
A16
D5
D4
D3
D2
D1
D0
RS
X2/CLKIN
X1
HD3
CLKOUT
DVSS
HPIENA
CVDD
CVSS
TMS
TCK
TRST
TDI
TDO
EMU1/OFF
EMU0
TOUT
HD2
HPI16
CLKMD3
CLKMD2
CLKMD1
DVSS
DVDD
BDX1
BFSX1
CVSS
A22
CVSS
DVDD
A10
HD7
A11
A12
A13
A14
A15
CVDD
HAS
DVSS
CVSS
CVDD
HCS
HR/W
READY
PS
DS
IS
R/W
MSTRB
IOSTRB
MSC
XF
HOLDA
IAQ
HOLD
BIO
MP/MC
DVDD
CVSS
BDR1
BFSR1
SS
DV
144
A21
CV
143
142
141
A8
140
A7
139
A6
138
A5
137
A4
136
HD6
135
A3
134
A2
133
A1
132
A0
131
DV
130
129
128
127
CV
126
125
HD5
124
D15
123
D14
122
D13
121
HD4
120
D12
11
9
D1
1
11
8
11
7
D9
11
6
D8
11
5
D7
11
4
D6
11
3
11
2
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
SS
CV
BCLKR1
HCNTL0
SS
BCLKR0
BCLKR2
BFSR0
BFSR2
BDR0
HCNTL1
BDR2
BCLKX0
BCLKX2
SS
DD
SS
HD0
BDX0
BDX2
IACK
HBIL
NMI
INT0
INT1
INT2
INT3
DD
HD1
SS
HRDY
HINT
111
CV
11
0
A19
109
70
71
72
BCLKX1
SS
DV
D10
BFSX2
SS
A20
DV
DD
CV
HDS2
SS
DV
DV
CV
DV
DV
CV
CV
DD
DD
DD
DD
SS
BFSX0
A9
NOTE A: DVDD is the power supply for the I/O pins while CVDD is the power supply for the core CPU. VSS
is the ground for both the I/O pins and the core CPU.
GPIO
MBus
64K RAM
Dual Access
Program/Data
McBSP1
McBSP2
McBSP3
RHEA Bus
APLL
TIMER
JTAG
Clocks
RHEAbus
RHEA
Bridge
TI BUS
xDMA
logic
16K Program
ROM
Pbus
Cbus
Dbus
Ebus
RHEA
bus
MBus
64K RAM
Single Access
Data
Cbus
Dbus
Ebus
Pbus
Cbus
Dbus
Ebus
Pbus
Enhanced XIO
P, C, D, E Buses and Control Signals
XIO
16HPI
54X cLEAD
16 HPI
7480 : TMS320VC5416
Содержание 411EXP
Страница 18: ...3 4 7400 TMP86CS25F 7400 TMP86CS25F ...