10.
Circuit Diagrams and PWB Layouts
SSB: PNX5100 - Ctrl/PCI/Debug
S
CL
ADR
NC1
NC2
E2
S
DA
WC
TDI
TDO
RE
S
ET_
S
Y
S
S
DA
S
CL
S
DA
S
CL
RX
TX
RX
TX
XTAL
UA1
UA2
1
2
TM
S
TR
S
T
NC
RE
S
ET_IN
OUT2
OUT
IN
VPP_ID
OB
S
ERVE
TCK
GPIO
0
12
11
10
9
8
7
6
5
4
3
2
1
1
3
14
15
C
7
8
9
10
11
12
1
3
0
CLK
INTA
0
1
2
3
5
6
AD
CBE
S
EL
XIO
GNTB
GNTA
GNT
REQB
REQA
REQ
S
ERR
PERR
ID
S
EL
DEV
S
EL
S
TOP
TRDY
IRDY
FRAME
PAR
3
2
1
0
3
PLL_OUT
4
14
15
16
17
1
8
19
20
21
22
2
3
24
25
26
27
2
8
29
3
0
3
1
AD25
ACK
2
1
7
9
J
6
All right
s
re
s
erved. Reprod
u
ction in whole or in p
a
rt
s
2CD1 D7
3
CD1-1 F6
3
CD1-2 F7
3
CD1-
3
F7
3
CD1-4 F6
3
CD2 F6
3
CD
3
E6
3
CD4 F6
H
3
CD7 E9
" XCJ0
~
XCJZ "
4
B
6
12
4
C0
8
OR C16
10
FOR /
8
2 ONLY
A
10
11
12
1
2
3
4
5
6CJ0 F
3
7C00-1 D
8
I
H
G
6
1
3
12
8
1
3
A
B
C
D
E
F
G
H
1CD0 D6
2CD0 D6
12
A
B
C
D
E
F
G
5
J
A
owner.
E
B
F
PNX5100 - CONTROL / PCI / DEBUG
3
CD
8
E9
1
2
3
4
5
6
7
8
9
3
CFL-2 C5
3
CFL-
3
C5
3
CFN C5
3
CJ0 F
3
3
CJ1 F2
4CJ1 B7
4CJ2 B7
4CJ
3
B7
C
C
7C00-2 A
3
7C00-
3
B
8
7CD0 F9
7CJ0 G
3
9CD0 G11
FCD0 E7
FCD1 E7
FCD2 E7
FCD
3
E7
FCD4 E7
FCD6 G10
E
RE
S
ERVED
2
7
8
9
10
11
I
11
3
1
BD 12NC :
3
1
3
9_12
3
_644
33
MULTI 12NC :
3
1
3
9_12
3
_6442
3
11
5
FCD7 F7
FCD
8
E7
FCD9 G
3
FCDA G10
FCDB G10
FCJ0 G
3
ICD1 C4
F
i
s
prohi
b
ited witho
u
t the written con
s
ent of the copyright
3
CD9 E9
3
CDA E9
3
CDB G12
3
CDC G10
3
CDD G10
3
CF1 C5
3
CFK-1 B5
3
CFK-2 B5
3
CFK-
3
B5
3
CFL-1 C5
CELL 12NC :
8
2
3
9_125_147
83
1
9
3
2
" XCD0
~
XCDZ "
D
" XCF0
~
XCFZ "
only for DEBUG
10
7
D
8
G
H
4CJ2
FCD
3
7
3
CD
8
100R
7CD0
M24C0
8
-WDW6
3
1
2
6
5
8
4
(1Kx
8
)
Φ
EEPROM
FCD4
51
0
K
3
CD1-4
4
+
3
V
3
+
3
V
3
+
3
V
3
9CD0
1
8
3
CD1-1
1
0K
FCJ0
4CJ
3
1CD0
27M
100R
3
CDA
3
CD
3
ICD1
RE
S
10K
10K
3
CFN
2CD1
22p
C22
AF26
C24
C26
B25
B26
A26
A25
A24
AE24
AF25
B24
A2
3
B2
3
C2
3
B22
3
6
GPIO
Φ
PNX5100E
7C00-
3
RE
S
100R
3
CFK-
3
J2
AF
8
AE
8
AD
8
AC
8
AB21
AE1
3
AF1
3
AF14
AF24
AD12
K2
L2
K1
L1
H4
H2
H
3
J1
CONTROL
Φ
7C00-1
PNX5100E
G22
H22
W22
Y22
R1
RE
S
S
ML-
3
10
6CJ0
+
3
V
3
FCD
8
FCD1
4K7
3
CDB
1
3
0
10
2
2009-02-25
-- -- --
200
8
-10-17
A
3
PCB
S
B
SS
B BD
TV54
3
_2K9
3
1
3
9 12
3
644
3
CHECK
DATE
NAME
3
S
UPER
S
.
1
CLA
SS
_NO
*
*
*
*
*
*
*
*
E
M
A
N
T
E
S
N
H
C
25
3
PC
33
2
2
3
200
8
-10-17
ROYAL PHILIP
S
ELECTRONIC
S
N.V. 200
8
****
***
*****
S
V
2009-06-1
8
DC
3
94240
H
ua
ng De
q
i
a
ng
2009-01-16
2
3
10K
3
CD2
10K
3
CF1
+
3
V
3
+
3
V
3
100R
3
CDD
3
CDC
100R
FCD7
3
6
+
3
V
3
10K
3
CD1-
3
100R
3
CD9
4CJ1
+
3
V
3
V2
H1
AC6
AF7
M2
M
3
M4
N1
AE7
L4
M1
V1
W
3
W1
AD6
AC7
AD7
W2
V4
AA4
AA
3
AE5
AD5
AC5
AF4
L
3
V
3
U2
AE6
AF6
P2
P1
N4
AF
3
N
3
N2
AE
3
AF2
AB2
AB1
U1
T4
T
3
AD4
T2
T1
R4
R
3
R2
P4
P
3
AF5
AE4
AA2
AA1
Y4
Y
3
Y2
Y1
W4
27
Φ
PCI_XIO
PNX5100E
7C00-2
3
CD1-2
1
0K
FCD0
22p
2CD0
3
CFL-
3
100R
3
6
+
3
V
3
2
7
RE
S
1
8
RE
S
100R
3
CFL-2
RE
S 3
CFK-1
100R
+
3
V
3
FCD2
2
7
FCDB
RE
S 3
CFK-2
100R
FCDA
FCD9
RE
S
3
CJ0
33
0R
10K
3
CD4
7CJ0
PDTC114EU
RE
S
FCD6
100R
3
CD7
+
3
V
3
+
3
V
3
100R
3
CFL-1 1
8
10K
3
CJ1
RE
S
RE
S
ET-PNX5100
EJTAG-PNX5100-TR
S
Tn
RE
S
PNX5100-ROT
PNX5100-LCD-PWR-ON
PNX5100-BL-CTRL
PNX5100-R
S
T-OUT
PNX5100-BL-BOO
S
T
EJTAG-PNX5100-TDI
EJTAG-PNX5100-TDO
EJTAG-PNX5100-TM
S
PNX5100-R
S
T-OUT
S
DA-AMBI-
3
V
3
S
CL-AMBI-
3
V
3
S
DA-
SS
B
S
CL-
SS
B
WC-EEPROM-PNX5100_
S
PI-DI
S
CL-
SS
B
S
DA-
SS
B
WC-EEPROM-PNX5100_
S
PI-DI
PCI-AD
3
1
PCI-AD4
PCI-AD5
PCI-AD6
PCI-AD7
PCI-AD
8
PCI-AD9
PCI-CBE0
PCI-CBE1
PCI-CBE2
PCI-CBE
3
PCI-CLK-PNX5100
PCI-DEV
S
EL
PCI-FRAME
PCI-AD25
PCI-IRDY
PCI-PAR
PCI-PERR
PCI-
S
ERR
PCI-
S
TOP
PCI-TRDY
EJTAG-PNX5100-TCK
PCI-AD0
PCI-AD1
PCI-AD10
PCI-AD11
PCI-AD12
PCI-AD1
3
PCI-AD14
PCI-AD15
PCI-AD16
PCI-AD17
PCI-AD1
8
PCI-AD19
PCI-AD2
PCI-AD20
PCI-AD21
PCI-AD22
PCI-AD2
3
PCI-AD24
PCI-AD25
PCI-AD26
PCI-AD27
PCI-AD2
8
PCI-AD29
PCI-AD
3
PCI-AD
3
0
1
8
561_504_09071
3
.ep
s
09071
3
Содержание 40PFL8664H/12
Страница 48: ...IC Data Sheets EN 48 Q548 1E LB 8 2009 Dec 18 ...