
Circuit Diagrams and PWB Layouts
10.
DC/DC
19100_025_110210.eps
110211
DC/DC
B03E
B03E
2010-12-10
4
3139 123 6495
SPB SSB TV550
2K11 4DDR EU
GND
VIN
A
P
S
H
INH
SYNC
SW
VFB
A
S
W
VIA
COM
N
I
T
U
O
COM
N
I
T
U
O
GND
VIN
A
P
S
H
INH
SYNC
SW
VFB
A
S
W
VIA
FOR 5000 SERIES ONLY
∗
∗∗
(
∗
)
(
∗∗
)
NOT FOR 5000 SERIES
10K
3U07
2
6
1
+1V1
+5V
RE
S
RES
BC847BS(COL)
7U05-1
+12V
1
%
3UD2
3
UD
3
100K
16V
120K
2UE4
220
u
IUD1
IUD2
10
11
12
1
3
14
15
3
1
6
ST1S10PH
7UD0-2
4
9
2
8
7
5
7UD0-1
ST1S10PH
3
UD4
1M0
4n7
2UD7
+2V5
10K
RE
S
3U06
RE
S
2U27
100n
2UD1
10
u
10
u
2UD0
22
u
2UE9
IU28
RE
S
2UD
8
10
u
+1V1
IUD4
100n
2UE5
IUD3
S1D
6UD1
2UE
3
22
u
22
u
2UE2
5
3
4
RES
BC847BS(COL)
7U05-2
IUD0
FUD3
+3V3
2UD5
22
u
IUD6
FUD2
10
u
2UD2
1
%
u
2
2
V
6
1
2UE6
3
UD0
6
8
K
30R
5UD3
1
3
2
7UD3
LD1117DT33
RE
S
100n
2U2
8
2UE0
10
u
10
u
2UD9
+12V
+5V5-TUN
IUD5
u
0
2
2V
6
1
2UD6
6UD0
SS36
33
K
3
UD1
1
%
1n0
2UD
3
RE
S
4n7
2UE1
IUD7
33
K
1
%
3
UD5
5UD0
30R
22
u
2UD4
5UD1
3u6
3u6
5UD2
7UD1-2
ST1S10PH
10
11
12
1
3
14
15
16V
1
6
2UE
8
22
u
7UD1-1
4
9
2
8
7
3
5
+5V
+3V3
ST1S10PH
IU27
3
2
7UD2
LD1117DT25
1
2UE7
100n
ENABLE-3V3-5V
ENABLE-3V3-5V