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Circuit Diagrams and PWB Layouts
10.
10.4 B 17MB82S SSB
10-4-1
B01, DVB-T/C - CI Interface - USB- Active Antenna - Led
19710_500_140409.ep
s
140409
DVT_T/C Demod - CI Interf
a
ce - U
S
B- Active Antenn
a
- Led
B01
B01
DVT_T/C Demod - CI Interf
a
ce
U
S
B- Active Antenn
a
- Led
22R
R2002
1
2
3
4
5
6
7
8
R2
R3
R1
R4
22R
R2001
8
7
6
5
4
3
2
1
R2
R3
R1
R4
R2003
22R
1
2
3
4
5
6
7
8
R2
R3
R1
R4
22R
R2004
1
2
3
4
5
6
7
8
R2
R3
R1
R4
22R
1
2
3
4
5
6
7
8
R2005
R2
R3
R1
R4
R2008
680R
4k7
R2010
2
1
16V
C712
100n
680R
R2009
U40
TPS2553-1
4
5
6
3
2
1
IN
GND
EN
OUT
ILIM
FAULT
TP200
1
50V
100p
C713
ACT_ANT
C714
10u
16V
1k
F189
TP122
TP121
TP120
TP119
CN18
5
4
3
2
1
LBS
LBS
MXL601_SCL
MXL601_SDA
10k
R2101
2
1
5135_IF_P
5135_IF_N
C1116
10V
100n
BC848B
Q34
560R
R2069
5V_VCC
F186
60R
AZ099-04S
U45
6
5
4
3
2
1
IO1
GND
IO2
IO3
VDD
IO4
TPS2553-1
U44
4
5
6
3
2
1
IN
GND
EN
OUT
ILIM
FAULT
S311
R2129
33R
S2_TS_CLK
5V_VCC
USB1_VCC
5V_STBY
S17
2
1
330R
F96
2
1
R474
220R
2
1
R74
10k
2
1
Q5
BC848B
3
2
1
10k
R73
2
1
10k
R72
2
1
BC848B
Q4
3
2
1
R71
10k
2
1
27p
C1
50V
2
1
560R
R2070
F60
1k
220R
R473
2
1
Q40
BC858B
3
2
1
10k
R70
2
1
Q39
BC858B
3
2
1
R472
220R
2
1
100n
C118
10V
USB1_VCC
R2118
10k
TP209
27MHz
X5
2
4
1
3
C179
27p
2
1
5V_VCC
S2_TS_SYNC
S2_TS_ VAL
S2_TS_DATA_0
R2199
33R
8
7
6
5
4
3
2
1
R4
R3
R2
R1
220R
R471
2
1
TP107
CN6
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
10V
C120
100n
100n
C121
10V
C122
100n
10V
100n
C123
10V
TP110
TP210
3V3_VCC
5135_DV33
D8
C5V6
2
1
IF_AGC
16V
47n
C358
33R
R2130
AVDD33_1
C180
27p
2
1
C1163
10u
6V3
BSH103
Q49
S2_TUN_RESET
PVR_TS_DATA0
CN28
4
3
2
1
5V_VCC
R253
33k
10k
R208
R2201
47R
CLK_5135
DEMOD_RST
PVR_TS_DATA0
S313
R209
10k
10R
R643
2
1
R644
10R
2
1
USB1_DP
USB1_DM
3V3_VCC
4k7
R426
2
1
USB1_VCC
5V_VCC
4k7
R428
2
1
R2140
10k
USB1_VCC
10u
16V
C623
5135_AV12
330R
F11
2
1
1k
F2
R510
33k
10V
C106
100n
2
1
5V_VCC
1V2_AVCC
12V_VCC
C12
50V
10p
10V
100n
C107
C108
100n
10V
USB_ENABLE
VCC_PCMCIA
1V2_MT5820
10u
6V3
C582
AVDD33_4
5135_DV33
R26
33R
8
7
6
5
4
3
2
1
R4
R3
R2
R1
R49
47R
10p
50V
C488
S143
R737
1M
1k
F82
C577
10u
6V3
10V
100n
C119
1k
F83
F85
1k
LED2
LED1
IR_IN
F84
1k
F86
1k
C578
10u
6V3
R449
47k
47k
R450
S2_TS_DATA_3
10u
C579
6V3
10u
6V3
C580
10V
100n
C1207
S2_TS_DATA_2
S2_TS_DATA_1
S2_TS_DATA_0
Q222
BC848B
3
2
1
10k
R2096
2
1
S2_TS_DATA_6
S2_TS_DATA_5
C124
10V
100n
C125
10V
100n
C126
10V
100n
100n
C127
10V
AVDD33_1
AVDD33_2
AVDD33_3
AVDD33_4
AVDD33_1
AVDD33_2
AVDD33_3
5135_DV33
5135_DV10
6V3
C583
10u
C128
10V
100n
R758
4k7
5135_DV33
C129
10V
100n
R759
4k7
5135_DV33
5135_DV33
5135_DV33
47R
R51
U15
MT5135
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
A15
A24
A12
A25
A7
VS2_
A6
PCMCIA_RESET
A5
WAIT_
A4
A3
DVSS_6
DVDD33_4
REG_
DVSS_7
DVDD10_3
A2
BVD2
A1
BVD1
A0
D8
D0
D9
D1
D10
D2
CD2_
CI_INT
DVSS_8
DVDD33_5
D13
D6
D14
D7
D15
CE1_
DVDD33_2
DVSS_3
A10
VS1_
OE_
IORD_
A11
IOWR_
A9
A17
A8
DVSS_4
DVDD10_2
A18
A13
A19
A14
A20
DVDD33_3
DVSS_5
WE_
A21
READY
A22
A16
A23
D5
D12
D4
D11
D3
CD1_
CHIP_CTRL
S2_TS_DATA7
S2_TS_DATA6
S2_TS_DATA5
S2_TS_DATA4
S2_TS_DATA3
S2_TS_DATA2
S2_TS_DATA1
DVDD33_1
DVSS_2
S2_TS_DATA0
S2_TS_VAL
S2_TS_SYNC
S2_TS_CLK
RF_AGC
IF_AGC
TUNER_CLK
TUNER_DATA
DVDD10_1
DVSS_1
AVDD33_IFPGA
AVDD12_DEMOD
IFPGA_INP
IFPGA_INN
AVSS12_DEMOD
EXT_CLKSEL
AVDD33_XTAL
XTALO
AVSS33_XTAL
XTALI
AVSS33_DEMOD
AVDD33_DEMOD
TP
TN
AVSS33_RSSI
ADIN0
AVDD33_RSSI
AVDD12_PLL
DVDD10
MT5135_RST_B
DEMOD_TS_CLK
DEMOD_TS_VAL
DEMOD_TS_SYNC
DEMOD_TS_DATA0
DVDD33
DVSS
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA0
PVR_TS_CLK
PVR_TS_VAL
PVR_TS_SYNC
PVR_TS_DATA0
PVR_TS_DATA1
SPI_CLK
SPI_DATA
SPI_CLE
S2_TS_DATA_4
S2_TS_DATA_7
S2_TS_ VAL
S2_TS_SYNC
S2_TS_CLK
TP198
TP199
R2094
33R
8
7
6
5
4
3
2
1
R4
R3
R2
R1
R50
47R
10p
C489
50V
10p
50V
C490
R201
10k
10k
R202
10k
R203
100n
10V
C130
10V
100n
C131
R204
10k
5135_DV33
R196
10k
10k
R197
10k
R198
100n
C132
10V
5135_AV12
5135_DV10
5135_AV12
5135_DV10
5135_DV10
5135_DV10
VCC_PCMCIA
VCC_PCMCIA
1V2_AVCC
VCC_PCMCIA
5135_AV12
10V
C133
100n
10p
C491
50V
50V
C492
10p
10V
100n
C134
10k
R199
10k
R200
10k
R205
10k
R206
VCC_PCMCIA
R207
10k
3V3_AVCC
1k
F81
3V3_AVCC
F87
1k
M_CI_OUTDATA5
M_CI_OUTDATA5
M_CI_INVALID
M_CI_INVALID
CI_IREQ#
CI_IREQ#
CI_IREQ#
M_CI_INDATA3
M_CI_INDATA3
M_CI_INDATA4
M_CI_INDATA4
CI_WE#
CI_WE#
CI_WE#
M_CI_INDATA2
M_CI_INDATA2
CI_A14
CI_A14
M_CI_INDATA1
M_CI_INDATA1
CI_A13
CI_A13
M_CI_INDATA0
M_CI_INDATA0
CI_A8
CI_A8
M_CI_INSYNC
M_CI_INSYNC
CI_A9
CI_A9
CI_IOWR#
CI_IOWR#
CI_IOWR#
CI_A11
CI_A11
CI_IORD#
CI_IORD#
CI_IORD#
CI_OE#
CI_OE#
CI_OE#
CI_A10
CI_A10
M_CI_OUTDATA7
M_CI_OUTDATA7
CI_D7
CI_D7
M_CI_OUTDATA6
M_CI_OUTDATA6
CI_D6
CI_D6
M_CI_INDATA5
M_CI_INDATA5
M_CI_INDATA6
M_CI_INDATA6
CI_A12
CI_A12
M_CI_INDATA7
M_CI_INDATA7
CI_A7
CI_A7
M_CI_OUTCLK
M_CI_OUTCLK
CI_A6
CI_A6
CI_RESET
CI_RESET
CI_A5
CI_A5
CI_WAIT#
CI_WAIT#
CI_WAIT#
CI_A4
CI_A4
CI_A3
CI_A3
CI_REG#
CI_REG#
CI_A2
CI_A2
M_CI_OUTVALID
M_CI_OUTVALID
CI_A1
CI_A1
M_CI_OUTSYNC
M_CI_OUTSYNC
CI_A0
CI_A0
M_CI_OUTDATA0
M_CI_OUTDATA0
CI_D0
CI_D0
M_CI_OUTDATA1
M_CI_OUTDATA1
M_CI_INCLK
M_CI_INCLK
M_CI_OUTDATA4
M_CI_OUTDATA4
CI_D4
CI_D4
M_CI_OUTDATA3
M_CI_OUTDATA3
CI_D3
CI_D3
CI_D5
CI_D5
DEMOD_TSVAL
DEMOD_TSVAL
DEMOD_TSSYNC
DEMOD_TSDATA0
DEMOD_TSCLK
CI_PWR_EN
CI_PWR_EN
RF_AGC_5135
CI_D2
CI_D2
CI_D1
CI_D1
CI_INT
M_CI_OUTDATA2
M_CI_OUTDATA2
CI_INVALID
CI_INVALID
CI_INSYNC
CI_INSYNC
CI_INDATA0
CI_INDATA0
CI_INDATA1
CI_INDATA1
CI_INDATA2
CI_INDATA2
CI_INDATA3
CI_INDATA3
CI_INDATA4
CI_INDATA4
CI_INDATA5
CI_INDATA5
CI_INDATA6
CI_INDATA6
CI_INDATA7
CI_INDATA7
CI_INCLK
CI_INCLK
CI_OUTCLK
CI_OUTCLK
CI_OUTCLK
CI_OUTVALID
CI_OUTVALID
CI_OUTSYNC
CI_OUTSYNC
CI_OUTDATA0
CI_OUTDATA0
CI_OUTDATA1
CI_OUTDATA1
CI_OUTDATA2
CI_OUTDATA2
CI_OUTDATA3
CI_OUTDATA3
CI_OUTDATA4
CI_OUTDATA4
CI_OUTDATA5
CI_OUTDATA5
CI_OUTDATA6
CI_OUTDATA6
CI_OUTDATA7
CI_OUTDATA7
CI_VS1#
CI_VS1#
CI_VS1#
CI_CE1#
CI_CE1#
XTALI
XTALI
XTALI
CI_CE2#
CI_CE2#
CI_CD2#
CI_CD2#
CI_CD2#
CI_CD1#
CI_CD1#
CI_CD1#
DEMOD_RST
SPI_CLK
SPI_DATA
SPI_CLE
USB1_VCC
LBS
XTALO
XTALO
XTALO
LED&VFD
sat bypass option
ANTENNA INPUT
ACTIVE ANTENNA
CI INTERFACE
FC OPT.
TI OPT.
FC pin5 NC, pin6 current limit, R from VCC to pin6 NC
TI pin5 current limit, pin4 fault, R from pin4 to GND NC
1: Differential
0: Single End
close to mt5135
TI OPT.
close to pcmcia
CI girisi ust-altta konacak
nc
NC
17mb82s-r2