GRL-PCIE-TX Quick Start/User Guide/MOI
Rev1.0
© PCI-SIG 2022
Version 1.0, Mar 2022. Updated 03.26.2022
Page.
39
7.3
System Board Tx Preset Test
Note: Make sure to terminate lanes that are not being tested with 50-ohm MMPX terminators.
1.
Set up the test equipment as described in Section 4.2.1.
2.
Adjust the Scope to display Preset 0 (P0) at 32 GT/s with the following configuration:
•
Bandwidth: 33 GHz
•
Sampling Rate: ≥ 128 GS/s
(2x interpolation allowed)
•
No embedding
3.
Push the compliance toggle on the DUT to capture Presets 0 to 10 (P0-P10) on Lane 0. Save the
captured presets to be used for post-processing.
4.
Save waveforms of all presets as “System_Lane
X
_Gen5_P0
Y
_d_.
wtf
”, where:
•
X = Lane number (0 to 15)
•
Y = Preset number (0 to 10)
•
wtf = waveform format (for example, .wfm for Tekscope waveform or .bin for Keysight
waveform)
5.
To test the presets, load the saved preset files in SigTest Phoenix (by selecting
PCIe
→
5_0
→
PresetTestAC
→
Template “
No_CTLE
”
→
Browse
) and run the preset tests (by selecting
Test
).
6.
When the preset tests have completed, select
Exit
to save the test results.
7.4
Add-In Card Tx Preset Test
Note: Make sure to terminate lanes that are not being tested with 50-ohm MMPX terminators.
1.
Set up the test equipment as described in Section 4.2.2.
2.
Turn on SSC on the CBB (-0.5% SSC down-spread).
3.
Adjust the Scope to display Preset 0 (P0) at 32 GT/s with the following configuration:
•
Bandwidth: 33 GHz
•
Sampling Rate: ≥
128 GS/s (2x interpolation allowed)
•
No embedding
4.
Push the compliance toggle on the DUT to capture Presets 0 to 10 (P0-P10) on Lane 0. Save the
captured presets to be used for post-processing.
5.
Save waveforms of all presets as “AIC_Lane
X
_Gen5_P0
Y
_d_.
wtf
”,
where:
•
X = Lane number (0 to 15)
•
Y = Preset number (0 to 10)
