Ref.
No.
Part No.
Part Name & Description
I/O
(V)
13
EIN
E signal input port.
I
1.65
14
FIN
F signal input port.
I
1.66
15
TEC
LPF capacitor connection port
for TE signal.
O
1.57
16
TE
TE signal output port.
O
1.57
17
TEIN
TE signal input port for TES.
I
1.65
18
LDD
Laser power control output
port.
O
3.27
19
LDS
Laser power detection input
port.
I
0
20
AVSS
GND for analog.
-
0
21
AVDD
VDD for analog.
-
3.27
22
FDO
Focus control signal output
port. D/A output.
O
1.65
23
TDO
Tracking control signal output
port. D/A output.
O
1.65
24
SLDO
Thread control signal output
port. D/A output.
O
1.64
25
SPDO
Spindle control signal output
port. D/A output.
O
1.64
26
VVSS1
GND for build-in VCO.
-
0
27
PDOUT1
Phase comparison output port1
for build-in VCO control.
O
0
28
PDOUT0
Phase comparison output port0
for build-in VCO control.
O
0
29
PCKIST
PDOUT0 1 output port for
current setting.
I
1.07
30
VVDD1
VDD for VCO.
-
3.29
31
DMUTEB
DMUTEB (general) output port.
-
-
32
PUIN
PUIN (general) I/O port. (With
built-in Pull-Up resistance.
Turning off when reset)
I/O
0
33
DEFFCT
Detection signal output port.
O
0
34
FSEQ
Synchronous signal output port.
It becomes ¡§H” when
Synchronous Idle detected from
the EFM signal is corresponding
to Synchronous Idle of internal
generation.
O
0
35
C2F
C2 error signal output port.
O
0
36
DVDD
VDD for Digital.
-
3.29
37
DVSS
GND forDigital.
-
0
38
DVDD18
VDD capacitor connection port
for digital circuit.
O
1.83
39
MONI0
Monitor port0.
O
0
40
MONI1
Monitor port1.
O
0
41
DVDD
VDD for Digital.
-
3.25
42
DVSS
GND forDigital.
-
0
43
CE
Host IF: Communication enable
signal input port.
I
0
44
CL
Host IF: Data transfer clock
input port.
I
3.56
45
DI
Host IF: Data input port.
I
0
46
DO
Host IF: Data output port (Nch
output) Pull-Up is necessary.
O
5.32
47
RESB
Reset input port. Make it L”
when power ON.
I
0
48
INTB
Interrupt signal output port.
(Servo)
-
-
49
SUB_READY0 For host u-com IF: SUB-RDY
output. (Nch and Pull-Up
resistance is necessary)
O
0
50
CD_MUTEO
General I/O port2. (With built-
in Pull-Up resistance. Turning
off when reset)
I/O
5.31
51
LOW_BATI
General I/O port1
I/O
5.16
52
CONT
General I/O port0
I/O
0
53
OSCCNT
OSCOFF control port . Connected
with 0V when Reset.
I
0
54
STREQ
Stream data demand signal
output port.
I/O
0
55
STCK
Clock input port for stream
data.
I/O
0
56
STDATA
Stream data input port.
I/O
0
57
TEST1
Inputport for test. Needed
connect with 0V1
I
0
58
DATA
Lch/Rch data output port.
-
-
59
DATACK
Clock output port.
-
-
60
LRSY
Lch/Rch clock output port
-
-
Ref.
No.
Part No.
Part Name & Description
I/O
(V)
61
VVDD2
VDD for build-in VCO.
-
3.25
62
VPREF2
Built-in VCO oscillation
cooking stove setting input
terminal.
I
3.25
63
VCOC2
Built-in VCO control voltage
setting input port.
I
1.08
64
VPDOUT2
Output port for built-in VCO
control.
O
0.08
65
VVSS2
GNDfor building VCO. Needed
connect with 0V.
-
0
66
DVDD18
VDD capacitor connection port
for digital circuit.
O
1.84
67
DVSS
GND for Digital system. Needed
connect with 0V.
-
0
68
DVDD
VDD for Digital system.
-
3.25
69
DOUT
Digital OUT output port. EIAJ
format.
-
-
70
AMUTEB
AMUTEB (general) output port.
-
-
71
XVSS
GND for oscillation circuit.
Needed connect with 0V.
-
0
72
XOUT
Connected of 16.9344MHz
oscillation.
O
1.39
73
XIN
Connected of 16.9345MHz
oscillation.
I
1.35
74
XVDD
VDD forOscillation circuit.
-
3.19
75
LCHO
L channel output port.
O
0
76
LRVDD
VDD for LR channel.
-
3.21
77
LRVSS
GND for LR channel. Needed
connect with 0V.
-
0
78
RCHO
R channel output port.
O
0
79
AVDD
VDD for analog .
-
3.27
80
SLCO
Slice level control output
port.
O
1.6
7
CQ-C1315N
Содержание CQ-C1315N
Страница 4: ...8 WIRING CONNECTION 4 CQ C1315N ...
Страница 5: ...9 BLOCK DIAGRAM 5 CQ C1315N ...
Страница 9: ...11 1 Main Block 11 PACKAGE AND IC BLOCK DIAGRAM PA51 J3CCBC000010 IC271 C1EA00000042 9 CQ C1315N ...
Страница 10: ...IC401 C1BB00001088 IC701 C0DAZHF00004 10 CQ C1315N ...
Страница 11: ...IC251 C1BB00000804 11 CQ C1315N ...
Страница 16: ...13 EXPLODED VIEW Unit 16 CQ C1315N ...
Страница 18: ...15 EXPLODED VIEW CD Deck 18 CQ C1315N ...
Страница 19: ...16 WIRING DIAGRAM 16 1 Main Block 1 E 4C314 TOP VIEW CQ C1304U C1325N C1315N C1305W MAIN PCB 19 CQ C1315N ...
Страница 20: ...16 2 Main Block 2 E 4C314 BOTTOM VIEW CQ C1304U C1325N C1315N C1305W MAIN PCB 20 CQ C1315N ...
Страница 21: ...16 3 Display Block E 4C315 TOP VIEW CQ C1325N C1315N C1305W DISPLAY PCB E 4C315 BOTTOM VIEW 21 CQ C1315N ...
Страница 24: ...THIS PAGE IS JUST FOR THE PAGE LAYOUT USE ONLY ...
Страница 25: ...18 SCHEMATIC DIAGRAM 2 18 1 Display Block E 4C315 CQ C1325N C1315N C1305W DISPLAY BLOCK 25 CQ C1315N ...