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SPI/I2C/UART/RS485 Header
Pin
Function
1
SPI MIS0
2
SPI MOSI
3
SPI CLK
4
SPI CS
5
I2C SDA
6
I2C SCL
7
UART TX / RS485+
8
UART RX / RS485-
9
NC
10
GND
Communication terminal pinout
SPI, I2C, and UART/RS485 interfaces not used internally are isolated and exposed on a
communications header on the bottom IO face.
In the standard configuration, the following interfaces are connected:
●
SPI4 (chip select #1)
●
I2C6
●
UART1
UART1 may also be routed to an onboard RS485 transceiver outputting on the same connector pins.
TX/RX control is implemented via Pi/BCM GPIO 17.
Where necessary, internal pull-ups on the SPI and I2C interfaces are provided. Depending on the
length and configuration of the external wiring, customers may need to provide additional
components for signal conditioning.
Front Display
A 320x240 full-color backlit display with capacitive touchscreen is provided for customer use, for
displaying diagnostic or setup information. It can be configured as an additional desktop display
using a framebuffer driver or used independently of the operating system graphics system via the
SPI3 interface.
A demonstration application with basic diagnostic information is provided as part of
OnLogic-supplied operating systems. Example code and additional information is available in the
FR200 software documentation (see appendix).
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Содержание Factor 202
Страница 1: ...FR202 Product Manual ...
Страница 10: ...1 4 Exterior Features and Dimensions 1 4 1 Top I O 1 4 2 Bottom I O 10 ...
Страница 11: ...1 4 3 Factor 202 Dimensions FR202 11 ...
Страница 12: ...1 5 System Block Diagrams 12 ...
Страница 15: ... Active Low Sinking Output Compatible Input Wiring Active High Sourcing Output Compatible Input Wiring 15 ...
Страница 17: ...Sourcing Output Wiring 17 ...
Страница 18: ...Sinking Output Wiring 2 2 Bottom I O Definition 18 ...
Страница 30: ...30 ...