ON Semiconductor NCD9830GEVB, Руководство пользователя

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NCD9830GEVB
http://onsemi.com
2
Figure 2. Block Diagram of NCD9830
GND
A1
CH0
CH1
A0
CH2
CH3
CH6
CH5
CH4
NCD9830
CH7
COM
REFIN/REFOUT
5
3
7
2
6
1
4
8
11
10 16 9
V
DD
8-bit
A-to-D
Converter
Temporary
Data Storage
I
2
C Interface
2.5 V Ref
SDA SCL
14 15 12 13
Analog
MUX
HOW TO USE THIS MANUAL
Analog Interface
Two 8 way terminal blocks J1 & J2 are provided for
analog channels. They provide access to the analog input
pins of the ADC. The pin configurations of J1&J2 are
explained in Table 1
.
Table 1. PIN CONFIGURATION OF J1 & J2
Pin Number Signal Notes
J1.1−J1.7 (Odd) CH0−CH3
J1.2−J1.8 (Even) GND Each Channel has Individual Ground
J2.1−J2.7 (Odd) CH4−CH7
J2.2−J2.8 (Even) GND Each Channel has Individual Ground
The analog inputs can be applied to J1 & J2 odd pins
e.g. J1.1 for CH0, J2
.
3 for CH5 and so on according to the
table above (Each channel name is marked explicitly on the
PCB). Even pins from J1.2−J1.8 & J2
.
2−J2
.
8 can be used as
ground for individual input channels.
Reference Voltage
The NCD9830 internal DAC can be configured with an
externally supplied (50 mV to 5 V) reference or an
internally generated reference voltage of 2.5 V. However, to
avail of the full dynamic range an external reference of 5 V
must be used while operating the device at 5 V supply
voltage. The internal 2.5 V reference voltage is sufficient for
full dynamic range while operating the device at 2.7 V.
Jumper J5 is provided to switch external reference
ON/OFF. An inserted jumper corresponds to ON position
while it’s OFF otherwise. A 4 way terminal block J3 is
provided to supply external supply voltage (when a supply
voltage other than 3.3 V is used) and external reference
voltage. The pin configuration of J3 is explained in Table 2
.
Table 2. PIN CONFIGURATION OF J3
Pin Number Signal Notes
J3.1 External Supply
J3.3 External Reference
J3.2 & J3.4 GND Individual Ground Provided for Easy Access