EVBUM2659/D
3
Table 3. EVB JUMPER DESCRIPTIONS
Jumper
Default
Position
Description
J1
−
1
Open
Connects INPUT1 to VBIAS through 2.2 k
W
resistor R1
−
1
J2
−
1
Short
Bypasses CLOCK1 input 100
W
series termination resistor R2
−
1
J3
−
1
Open
Connects 1 k
W
||47 pF load to ground (R3
−
1, C3
−
1) at DATA1 output
J1
−
2
Open
Connects INPUT2 to VBIAS through 2.2 k
W
resistor R1
−
2
J2
−
2
Short
Bypasses CLOCK2 input 100
W
series termination resistor
J3
−
2
Open
Connects 1 k
W
||47 pF load to ground (R3
−
2, C3
−
2) at DATA2 output
J4
Short
Connects CLOCK1 input to CLOCK2 input
J5
Short
Connects DATA1 output to DATA2 output
Modes of Operation
Single
−
Channel or Independent Two
−
Channel Operation
This example uses Channel 1. However, these directions
will work for Channel 2 by substituting header numbers
‘
P
n
−
1
’ with ‘
P
n
−
2
’.
1. Remove J4 & J5.
2. Connect input signal to P1
−
1 or P7
−
1.
3. Connect PDM clock source to P2
−
1 or P4
−
1.
4. Connect PDM data receiver to P3
−
1 or P5
−
1.
5. Apply VDD.
6. Enable PDM clock.
Stereo Two
−
Channel Operation
This mode is typically used with a stereo
(dual
−
microphone) audio source. In this configuration, the
FAN3852 SELECT jumpers are set for left
−
channel audio
on Channel 1 & right
−
channel audio on Channel 2.
1. Connect J4 & J5.
2. Connect both input signals.
3. Connect PDM clock source to P2
−
1 or P4
−
1.
4. Connect PDM data receiver to P3
−
1 or P5
−
1.
5. Connect the P6
−
1 shorting jumper between pins 2
−
3.
6. Connect the P6
−
2 shorting jumper between pins 1
−
2.
7. Apply VDD.
8. Enable PDM clock.
Pin Descriptions
Figure 5 and Table 4 below describe the location and
function of each of the FAN3852 device pins.
Figure 5. Pin Configuration
A1
A2
B1
B2
C1
C2
Top View
VDD
INPUT
SELECT
DATA
GND
CLOCK
Table 4. FAN3852 PIN DESCRIPTIONS
Pin #
Pin Name
Type
Description
A1
CLOCK
Input
Clock Input
B1
GND
Input
Device Ground
C1
DATA
Input
PDM Output (1
−
bit ADC)
A2
SELECT
Output
Clock Edge Select
Low = Rising Edge
High = Falling Edge
B2
INPUT
Input
Analog Signal Input
C2
VDD
Input
Device Power