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201
Cycle Time
Section 8-3
Online Editing:
Interrupts will be masked for a maximum of 1,200 ms when online editing is
executed during operation.
Data Exchange with CPU Unit
Interrupts will be disabled when processing for data exchange with the CPU
Unit is being performed. The time for which interrupts are disabled will be
longer if LR Area and DM Area data exchange is also used in comparison to
using only the SR Area data exchange.
Example Calculation
This example shows the interrupt response time (i.e., the time from when the
interrupt input turns ON until the start of the interrupt processing routine)
when input interrupts are used under the conditions shown below.
Number of high-speed timers:
0 (No high-speed timers started)
Non-Fatal error detection:
Not canceled
Online edit:
Not used
DM/LR Area data exchange:
No
Minimum Response Time
Interrupt input ON delay:
50
m
s
Interrupt mask standby time:
0
m
s
+ Change-to-interrupt processing: 20
m
s
Minimum response time:
70
m
s
Maximum Response Time
Interrupt input ON delay:
50
m
s
Interrupt mask standby time:
10
m
s
+ Change-to-interrupt processing: 20
m
s
Minimum response time:
80
m
s
Note
1.
In addition to the response time shown above, the time required for execut-
ing the interrupt processing routine itself and a return time of 5
m
s must
also be accounted for when returning to the process that was interrupted.
2.
Be sure to allow for interrupt processing time when using interrupts in the
program.
3.
The IORF instruction can be used to output the results of interrupt process-
ing immediately. The results of processing in the main program will also be
output when IORF is executed.
4.
Analog outputs from the CS1W-HCA22-V1 can be output immediately
from the interrupt subroutine by using the SPED and ACC instructions if
the Unit Setup Area is set to update analog inputs immediately for instruc-
tion execution. The results of processing in the main program will also be
output when the instruction is executed.
Содержание CS1W-HCA12-V1
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