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3 Operation and Configuration
3-38
CJ-series High-speed Counter Units Operation Manual for NJ-series CPU Unit(W492)
3-6 Reset Counter
For every Counter a reset of the Counter Value to zero can be triggered by the following Sources:
• Software Reset Bit
• Digital Input (Function 05 or 06)
• Z-signal
In order for a Digital Input or the Z-Signal to trigger a reset, the Reset Enable Bit must be set to 1. Addi-
tionally a Digital Input can be assigned the function of Reset Enable (Function 15, refer to 3-4 Digital
Input Functions).
z
Software Reset Bit as Reset Source
You can reset each Counter by using the device variable for CJ-series Unit (for output) below.
These variables take priority over all other reset causes.
z
Digital Input as Reset Source
To use Digital Inputs as causes for resetting, it is necessary to allocate function 05 or 06 (reset func-
tion) to that Digital Input. For details, refer to 3-4 Digital Input Functions.
z
Z-Input Signal as Reset Source
To use the Z phase signal of an incremental encoder as a reset cause, first it is necessary to enable
the Z phase signal resets with bits 03 to 00 of the following device variables for CJ-series Unit (for
setting). Resets by Z phase signals can be set separately for each Counter.
Name of device variable
for CJ-series Unit
Type Name Function
*_Ch1_Rst BOOL Reset 0 to 1: Counter reset
*_Ch2_Rst
Name of device variable
for CJ-series Unit
Type Name Function
*_Ch1_ZOvfUdfCfg WORD Z-reset Mode / Over-
flow/Underflow error-
code generation Bits 03 to 00: Z phase reset
16#0: No function
16#1: Reset
Bits 07 to 04: Overflow/underflow error set-
ting
16#0: Do not generate error codes.
16#1: Generate error codes.
Bits 15 to 08: 16#00
*_Ch2_ZOvfUdfCfg
AND
Reset Enable sources:
Reset Enable Bit
Reset sources:
Digital Input
Z-Signal
Software Reset Bit
OR
Reset
Trigger
OR
Optional Digital Input
(Function 15)