Oki OKIPAGE 6e, Руководство по обслуживанию, Страница: 27 / 262

Operation Description 2 - 4 OKIPAGE 6e/6ex
Service Manual, P/N 59276401
2.1 Control Board
The control board consists of a single chip CPU, Program & Font ROM's, one or two DRAMs, an
EEPROM, a host interface circuit, and a mechanism driving circuit.
Single Chip CPU
The single chip CPU is a custom CPU (32-bit internal bus, 16-bit or 32-bit external bus, 25.54 MHz
clock with input frequency from a 12.27 MHz clock) which incorporates the RISC CPU and its
peripheral devices, and has the following functions:
Built-in device Function
Chip select controller Control of ROM, DRAM and I/O device
Bus controller
DRAM controller
DMA controller Transfer of image data from DRAM to video output port
Parallel interface controller Control of Centronics parallel interface
Video output port Control of LED head
LED STB output port
Timer Generation of various control timing
Monitoring of paper running and paper size
Serial I/O port Control of operator panel, EEPROM, and options
I/O port Input and output of sensor and motor signals
Program and Font ROM
The Program & Font ROM store the PCL5e emulation program and various types of fonts.
Mask ROM is used for a Program & Font ROM. The mounting location of this Program & Font ROM
varies depending on the type of ROM (for the mounting location see 7.2).