GENERAL FEATURES
__________________________________
EISA introduces the following major advances :
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32-bit memory addressing for CPU, DMA and bus
masters
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32-bit data transfers for CPU, DMA and bus masters
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allow high speed burst data transfer
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support intelligent bus master peripheral controllers
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enhanced DMA transfer rates
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33 MB/s data transfer rate for bus masters and DMA
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shareable interrupts, programmable for edge or level
triggering-automatic configuration of system and
expansion boards.
EISA systems provide a number of DMA
enhancements, including 32-bit addressability, 32-bit
data transfers and higher data transfer rate. EISA DMA is
backward compatible with AT bus and is a low cost
alternative to an intelligent bus master and can be used
for I/O peripheral that do not require local intelligent on
the peripheral.
EISA based system support a bus master
architecture for intelligent expansion cards. The bus
master architecture provide a high speed data transfer
rate upto 33 MB/s using EISA burst cycles. The bus
master provides local intelligence by including a
dedicated I/O processor and local memory. It can relieve
the burden on the main CPU by performing sophisticated
memory access functions, such as non-ordered scatter-
gather data transfers. Examples of applications that
might benefit from a 33 MB/s transfer rate and/or a bus
master implementation include disk controllers, LAN
controller, communication gateways, data acquisition
systems, and certain classes of graphic controllers.
Those applications might be found in network file
servers, engineering workstations, workstation for
software development, multi-user systems, some multi-
media applications etc.
Содержание DRAGON EISA 486
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Страница 131: ...EISA CONFIGURATION __________________________________ QUIT MENU Conclude the ECU utility and return to the DOS prompt ...
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Страница 137: ...Appendix E System Board Layout _______________________________ ...