NXP Semiconductors UM11712, Руководство пользователя, Страница: 25 / 31

NXP Semiconductors
UM11712
PCAL6534EV-ARD evaluation board
Figure 14. Graphical interface – “LED” tab activated
The GPIO tab ( Figure 15 ) is managing the remaining I/O lines of the DUT IC, which are
not allocated to the on-board peripheral (LED, switch, or on-board display). The lines are
the first five LSB of port P3, and are linked to connector J8 (see section 5.8 “I/O bus”).
From the GPIO window, the following parameters of the I/O pins of the DUT can be
configured:
• GPIO#: select the direction of the line (input or output).
• Latch:
enable / disable the corresponding latch of the input.
• Pull Up/Down Enable: enable / disable the internal pull-up or pull-down resistor.
• Pull UP/Down Selection: select the internal pull-up or pull-down resistor.
• Interrupt Mask: enable / disable the interrupt mask for the input;
• Polarity Inversion:
enable / disable the polarity inversion function for the input;
• Interrupt Edge: select the trigger type of the interrupt (level or edge);
• Interrupt Clear: clear the interrupt register;
With the Write button the configuration is written in the internal registers of the DUT IC,
while the Read will bring back the data from the DUT to GUI.
On the bottom of the window, a note details the GPIO allocation to the 10 BIT – I/O
PORT (connector J8).
UM11712 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved.
User manual Rev. 1.0 — 31 January 2022
25 / 31