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NXP Semiconductors
S32K3X4EVB-Q257 | S32K3X4EVBQ257ND
HWUM
Hardware User Manual
S32K3X4EVB-Q257 HWUM
All Information provided in this document is subject to legal disclaimers
© NXP B.V. 2020. All rights reserved
NXP Semiconductors
REV B
– 9/2021
Page
26
of
36
13 Ethernet MII/RMII Connector
– Pinout
Figure 23. S32K3X4EVB-Q257 | S32K3X4EVBQ257ND
– Ethernet MII/RMII Connector
Table 16. Ethernet MII/RMII Configuration
MODULE
/FUNCTION
SIGNAL
MCU
PORT
DESCRIPTION /COMMENT
MII/RMII
ENET_MII_RMII_RXD0
PTD9
All ports routed to the Ethernet MII/RMII signal
are not connected to other interface in the EVB
ENET_MII_RMII_RXD1
PTD8
ENET_MII_RXD2
PTC15
ENET_MII_RXD3
PTC14
ENET_MII_RMII_RX_CLK
PTC1
ENET_MII_RMII_RX_ER
PTC16
ENET_MII_RMII_RX_DV
PTC17
ENET_MII_RMII_TXD0
PTB5
ENET_MII_RMII_TXD1
PTB4
ENET_MII_TXD2
PTD6
ENET_MII_TXD3
PTD5
ENET_MII_RMII_TX_CLK
PTC0
ENET_MII_RMII_TX_EN
PTE9
ENET_MII_RMII_MDC
PTD17
ENET_MII_RMII_MDIO
PTD16
ENET_MII_COL
PTB23
ENET_MII_CRS
PTB22
R379
0
DNP
R1321
0
0402
GND
TPAD10
ENET_MII_RMII_TX_CLK
Page[11]
C218
10uF
TPAD12
ENET_MII_RXD2
Page[11]
ENET_INT_LS
Page[11]
ENET_MII_RMII_RX_DV
Page[11]
R1269
10K
R341
0
DNP
0603
TPAD5
ENET_MII_TX_ER
Page[11]
J63
QSH-030-01-L-D-A-K-TR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
SH1
SH2
SH3
SH4
I2C_SDA_LS
Page[11,13]
ENET_MII_TXC
R343
33 OHM
0402
P3V3_ENET
ENET_MII_RMII_RX_CLK
Page[11]
ENET_MII_COL
Page[11]
R371
33 OHM
0402
ENET_SPI_SCK_LS
Page[11]
ENET_INH_LS
Page[11]
ENET_MII_RMII_RXD1
Page[11]
ENET_MII_TXD2
Page[11]
R342
0
0603
TPAD1
ENET_RESET
Page[11]
C220
0.22UF
0402
R378
0
0603
C221
0.22UF
0402
R333
0
0603
R1270
33 OHM
0402
ENET_MII_TXD3
Page[11]
P3V3_ENET
R377
0
0603
C223
0.22UF
0402
R1271
33 OHM
0402
R336
0
0402
ENET_MII_RMII_TXD0
Page[11]
ENET_MII_RMII_TX_EN
Page[11]
TPAD11
ENET_SPI_SC_LS
Page[11]
Mating conn = Samtec QTH series
TPAD8
ENET_MII_RMII_MDIO
Page[11]
P5V0
R339
33 OHM
0402
VBATP
ENET_MII_RMII_TXD1
Page[11]
R481
10K
DNP
R369
0
0402
R381
0
0603
ENET_MII_RMII_RX_ER
Page[11]
R1144
33 OHM
0402
SPI_MISO
P3V3_ENET
GND7
1
GND
R370
33 OHM
0402
R382
0
DNP
0603
J64
HDR 1X1
DNP
1
R338
0
DNP
0603
SPI_SCK
TPAD2
ENET_MII_RXD3
Page[11]
C334
10uF
ENET_MII_RMII_MDC
Page[11]
R374
33 OHM
0402
SPI_MOSI
R353
0
0402
P3V3_ENET
ENET_SPI_MISO_LS
Page[11]
ENET_MII_RMII_RX_CLK
Page[11]
ENET_MII_RMII_RXD0
Page[11]
R360
0
0402
R367
33 OHM
0402
R335
0
0402
ENET_MII_RMII_RX_CLK
Page[11]
R480
10K
DNP
TPAD3
TPAD9
TPAD4
C219
0.22UF
0402
CLK
OUT
VDD
GND
OE
50MHZ
Y 5
4
2
3
1
R358
0
0402
ENET_MII_TX_ER
Page[11]
R375
33 OHM
0402
ENET_MII_CRS
Page[11]
R361
33 OHM
0402
R340
33 OHM
0402
P3V3_ENET
R380
0
DNP
TPAD7
R334
0
0402
R376
33 OHM
0402
R354
33 OHM
0402
R355
33 OHM
0402
GND
ENET_SPI_MOSI_LS
Page[11]
SPI_CS
ENET_MII_RMII_TX_CLK
Page[11]
TPAD6
C224
0.22UF
0402
CAD NOTE: ENET MII/RMII
signals must have the
same length so that the
propagation delay times
are equal
R1268
10K
I2C_SCL_LS
Page[11,13]