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NXP Semiconductors
UM11697
RDGD31603PSMKEVM three-phase inverter kit
4.2.5 Connectors, jumpers and potentiometers
Figure 5. RDGD31603PSMKEVM jumpers with variable VCC and VEE potentiometer locations
Name
Description
J2
Jumper 1-2 default - DC supply for VSUP to gate drivers supplied through J1 terminal
connection
Jumper Open VSUP supply to gate drivers isolated
J13
Jumper 1-2 default MOSI – Normal mode three device daisy chain three device high
side, three device low side (x3 – 2 channel)
Jumper 2-3 MOSI - Six device daisy chain all six gate drivers daisy chained together
(x6 – 1 channel)
J14
Jumper 1-2 default MISO-Normal mode three device daisy chain three device high
side, three device low side (x3 – 2 channel)
Jumper 2-3 MISO - Six device daisy chain all six gate drivers daisy chained together
(x6 – 1 channel)
J50
Jumper open default CSB-Normal mode three device high side, three device low side
(x3 - 2 channel)
Jumper 1-2 CSB - Six device daisy chain all six gate drivers daisy chained together (x6
- 1 channel)
J37 External signals
Miscellaneous PWM and Interrupt signals (See schematic for details)
J38 MCU Signals
Two-row header of all MCU signals for debug and development. (See schematic for
details)
J1 VPWR terminal connector
Used for external low voltage power supply connection, typically 12 V Vbatt
R265
5 kΩ pot to adjust fly-back VCC level all high-side gate drivers
R235
5 kΩ pot to adjust fly-back VCC level all low-side gate drivers
Table 5. RDGD31603PSMKEVM connector, jumper and potentiometer descriptions
UM11697
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© NXP B.V. 2021. All rights reserved.
User manual
Rev. 1 — 10 December 2021
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