NXP Semiconductors RDGD31603PHSEVM, Руководство пользователя

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NXP Semiconductors
UM11603
RDGD31603PHSEVM three-phase inverter reference design
Pin Name Function
B25 n.c. not connected
B26 FSSTATEH not connected
B27 n.c. not connected
B28 FSENB Fail-safe state enable bar
B29 FSSTATEL Fail-safe state low-side
B30 AOUTHW GD3160 analog output signal high-side W phase
B31 VPWR VPWR/VSUP 12 V voltage supply (low voltage domain)
B32 GNDP Ground connection (low voltage domain)
Table 1. PCIe connector pin definitions
...continued
4.2.3 Test points
All test points are clearly marked on the board. The following figure shows the location of
various test points.
Figure 3. RDGD31603PHSEVM test points
Test point name Function
DCV Micro DC voltage
DSTHU DESAT high-side U phase V
CE
desaturation connected to DESAT pin circuitry
DSTHV DESAT high-side V phase V
CE
desaturation connected to DESAT pin circuitry
DSTHW DESAT high-side W phase V
CE
desaturation connected to DESAT pin circuitry
DSTLU DESAT low-side U phase V
CE
desaturation connected to DESAT pin circuitry
DSTLV DESAT low-side V phase V
CE
desaturation connected to DESAT pin circuitry
DSTLW DESAT low-side W phase V
CE
desaturation connected to DESAT pin circuitry
FSISHU FSISO connection
Table 2. Test points
UM11063 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1 — 18 August 2021
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