NXP Semiconductors QorIQ LS1028A, Справочное руководство, Страница: 32 / 112

Table 13. Register configuration (continued)
M.2 connector select Signal name Mount register/capacitor Values
PEXM2_2_REFCLK_N R213
0 Ω
PEXM2_2_PET_P C409
0.22 μ
F ±10%
PEXM2_2_PET_N C410
0.22 μ
F ±10%
PEXM2_2_PER_P R216
0 Ω
PEXM2_2_PER_N R215
0 Ω
Type B PEXM2_2_REFCLK_P R223
0 Ω
PEXM2_2_REFCLK_N R222
0 Ω
PEXM2_2_PET_P C423
0.01 μ
F ±10%
PEXM2_2_PET_N C422
0.01 μ
F ±10%
PEXM2_2_PER_P C420
0.01 μ
F ±10%
PEXM2_2_PER_N C421
0.01 μ
F ±10%
1. By default, registers and capacitors are mounted for the M.2 Key E connector (J18).
The M.2 Key E connectors J16 and J18 have 1x4-pin headers J17 and J19, respectively, for coexistence signals. Since, co-
existence signal assignments on M.2 connectors is vendor dependant, refer to the vendor-specific documentation of M.2 modules
for details.
2.10.1 Adapters
You can use adapters to convert M.2 connector to a PCIe slot for PCIe Gen 1 and Gen 2 compliant endpoints. For more detail on
these adapters, click the following links.
• P11S-P11F - M.2 (NGFF) to PCI-E Extender Board
• P11S-P11F - Duo PCI-E to M.2 (NGFF) Extender Board
2.11 DUART interface
The LS1028A device provides one instance of the DUART block, which support two 2-wire serial ports with no hardware flow
control. On the LS1028ARDB board, the DUART ports connect to an RS-232 transceiver (Linear Technology LTC2804-1), which
translates the UART1 and UART2 signals to RS-232 levels. The RS-232 signals of UART1 and UART2 are provided on dual DB9
male connector (DTE configuration) to provide convenient communication channels to both terminal and host computers.
It is recommended to use UART1 as a debug port. The LTC2804-1 transceiver can support 1 Mbit/s data rate on each of the serial
ports.
The figure below shows the LS1028ARDB DUART connections.
LS1028ARDB Functional Description
QorIQ LS1028A Reference Design Board Reference Manual, Rev. b, 11/2018
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