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NXP Semiconductors
UM10883
PN7462 family Quick Start Guide - Development Kit
UM10883
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© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.6 — 14 May 2018
319816
52 of 120
Fig 51. Architecture diagram
7.1 Hardware abstraction layer – HAL
Hardware abstraction layer – HAL is responsible for the CPU, communication, memory
and utility peripherals. HAL composed of a set of HW functions, HW ISR and OSAL
functions.
The HW functions can further be divided to:
1. Atomic functions: functions configuring the HW, but don´t result in any event from the
HW, EEPROM, Flash, CRC, RNG, PMU/ PCR.
2. Blocking functions: functions configuring the HW and wait till one or more expected
events occurs from the HW. CLIF HAL, CT HAL, I2CM/ SPIM HAL
3. Non-blocking functions: functions configuring the HW and expect one or more
events, but don´t wait till it occurs. The events are notified to the caller of the
function. Timer, Host interface.
The HW ISR handles HW events (interrupts) and signals of the blocking functions or
notifies non-blocking functions. The HW ISR also handles time critical HW configuration
or functions.
7.2 Protocol abstraction layer – PAL
Protocol abstraction layer – PAL implement HW independent communication protocols
for contactless and contact interface and it is composed of two libraries.
NxpNfcRdLib library implement contactless protocol and application components.
Followed ISO/IEC contactless standards protocols are available:
•
ISO14443-3A
: Contactless proximity card air interface communication at 13.56MHz
for the Type A and Jewel contactless cards.