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Chapter 26 Deserial Serial Peripheral Interface (DSPI)
MPC5606BK Microcontroller Reference Manual, Rev. 2
610
Freescale Semiconductor
26.5.5
DSPI Status Register (DSPI
x
_SR)
The DSPI
x
_SR contains status and flag bits. The bits are set by the hardware and reflect the status of the
DSPI and indicate the occurrence of events that can generate interrupt or DMA requests. Software can
clear flag bits in the DSPI
x
_SR by writing a 1 to clear it (w1c). Writing a 0 to a flag bit has no effect. This
register may not be writable in Module Disable mode due to the use of power saving mechanisms.
Table 26-17. DSPI baud rate scaler
BR
Baud rate scaler value
BR
Baud rate scaler value
0000
2
1000
256
0001
4
1001
512
0010
6
1010
1024
0011
8
1011
2048
0100
16
1100
4096
0101
32
1101
8192
0110
64
1110
16384
0111
128
1111
32768
Offset: 0x2C
Access: R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCF
TXRXS
0
EOQF
TFUF
0
TFFF
0
0
0
0
0
RFOF
0
RFDF
0
W w1c
w1c
w1c
w1c
w1c
w1c
Reset
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
TXCTR
TXNXTPTR
RXCTR
POPNXTPTR
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-6. DSPI Status Register (DSPI
x
_SR)
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