MPC555 / MPC556
INDEX
MOTOROLA
USER’S MANUAL
Rev. 15 October 2000
Index-1
INDEX
–A–
A(0
31),
ACKERR
Acknowledge error (ACKERR)
Address
-mark wakeup
space
address type (AT0-AT3),
ALE
ALEE
alignment exception,
ALU–BFU
AN
Analog
front-end multiplexer
input
multiplexed
port A
port B
section contents
submodule block diagram
supply pins
arbitration,
AT(0
3),
atomic update primitives,
atomic,
–B–
BAR
Base ID mask bits
Baud
clock
BB,
BDIP,
BE bit
Beginning of queue 2 (BQ2)
BG,
BI,
Binary
divider
-weighted capacitors
Bit stuff error (STUFFERR)
BITERR
BITS
Bits per transfer
enable (BITSE)
field (BITS)
BITSE
Bit-time
BKPT (TPU asserted)
BLC
BOFFINT
Boundary conditions
Boundary scan
cells
descriptor language
register
BPU
BQ2
BR,
Branch
prediction
processing unit
trace enable
Branch latch control (BLC)
Branch processing unit
Break frame
Breakpoint
asserted flag (BKPT)
flag (PCBK)
Breakpoint counter A value and control register
Breakpoint counter B value and control register
BRKNOMSK
BSC
BSR
burst indicator (BURST),
burst inhibit (BI),
burst read cycle (illustration),
burst transfer,
burst write cycle (illustration),
BURST,
Bus
monitor
off interrupt
(BOFFINT)
bus busy (BB),
bus exception control cycles,
bus grant (BG),
bus interface
bus control signals,
bus operation
address transfer phase related signals,
arbitration phase,
basic transfer protocol,
burst mechanism,
burst transfer,
bus exception control cycles,
single beat transfer
single beat read flow,
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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