NXP Semiconductors MC56F80000-EVKUM, Руководство пользователя, Страница: 24 / 26

NXP Semiconductors
MC56F80000-EVKUM
MC56F80000-EVK Board User Manual
Pin number Signal name Description
6 GND Ground
7 - Not connected
8 - Not connected
9 GPIOD4/RESET Reset signal
10 GPIOD3/TMS TAP machine state
11 VDD Power supply
12 - Not connected
13 VDD Power supply
14 - Not connected
Table 21. JTAG header (J10) pinout
...continued
2.12.2 OpenSDA debug interface
The MC56F80000-EVK board supports onboard OpenSDA debugging.
The below table describes the signals and peripherals used for OpenSDA JTAG
interface.
OpenSDA processor Target processor
JTAG signal Direction
control / Enable
signal
Voltage
Voltage
translator, 74
LVC1T45GW,
part identifier
Jumper
configuration
Signal Voltage
Description
SDA_SWD_SCK SDA_SWD_EN P3V3_VREG_
OUT
U7 J13: short pin 1-2 GPIOD2/TCK VDD TAP clock
SDA_SWD_
DOUT
SDA_SWD_OE P3V3_VREG_
OUT
U8 J13: short pin 3-4 GPIOD3/TMS VDD TAP machine
state
SDA_SWD_
DOUT_TDI
SDA_SWD_EN P3V3_VREG_
OUT
U9 J13: short pin 5-6 GPIOD0/TDI VDD TAP data in
SDA_SWD_
SWO
GND P3V3_VREG_
OUT
U10 J13: short pin 7-8 GPIOD1/TDO VDD TAP data out
SDA_RST_
TGTMCU
SDA_LVLRST_
EN
P3V3_VREG_
OUT
U5 J11: short pin 1-2 GPIOD4/
RESET
VDD For Jumper
11 setting
detail, see
Section 1.9
Table 22. OpenSDA JTAG interface
3 Revision history
The table below summarizes the revisions to this document.
Revision Date Topic cross-reference Change description
1 14 December 2022 - Initial public release
Table 23. Revision history
MC56F80000-EVKUM All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.
User manual Rev. 1 — 14 December 2022
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