NXP Semiconductors FXTH870 D Series, Руководство пользователя

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FXTH870xD
Sensors
92 Freescale Semiconductor, Inc.
12.1 Features
Major features of the LFR module include:
• Differential input LF detector (two dedicated pins):
— Selectable sensitivity (two levels: Low Sens (LS) and High Sens (HS)).
— Thresholds trimmed at the factory with trim setting saved in nonvolatile memory.
— LFR has a reference oscillator (LFRO) trimmed at the factory with trim setting saved in nonvolatile memory.
— Selectable signal sampling time interval and on-time.
— Sample interval and on times controlled by LFR state machine or directly by the MCU.
• Configurable receive mode:
— Simple LF carrier detection/Telegram decode. (CARMOD)
• Configurable message protocol (telegram structure):
— Various SYNC decoding (SYNC[1:0])
6-bit time SYNC requirements
7.5-bit time SYNC requirements
9-bit time SYNC requirements
— Optional ID (ID[1:0])
8-bit or 16-bit ID
On or off
— 0-n bytes of message data. End-of-data marked by loss of Manchester at a byte boundary.
• Optional continuous monitoring and decode of the LF detector.
• Selectable MCU interrupt when a received data byte is ready in an LFR buffer, when a Manchester error is detected in the
frame, when an ID is received or when a valid carrier has been detected.
12.2 Modes of Operation
The LFR is a peripheral module on an MCU. After being configured by application software, the LFR can operate autonomously
to detect and verify incoming LF messages. When a valid message or carrier pulse is received and verified the LFR can wake
the MCU from standby modes to read received data or act upon a carrier detection.
The primary modes of operation for the LFR are:
• Disabled. Everything off and drawing minimal leakage current. LFR register contents will be retained.
• Carrier detect/listen. Minimum circuitry enabled to detect any incoming LF signal, check it for the appropriate signal level,
frequency and duration.
• TPMS protocol verification.
• Data reception.
12.3 Power Management
In addition to using low power circuit design techniques, the LFR module provides system-level features to minimize system
energy requirements. In an MCU that includes the LFR module, all MCU circuitry except a very low current 1-kHz oscillator (LFO)
and minimum regulator circuitry can be disabled. After a reset, the MCU would initialize the LFR module and then enter a very
low power standby mode (depending upon the MCU, this could be lower than 1 uA for the MCU portion). The LFR module
includes everything it needs to periodically listen for LF messages, perform Manchester decoding, verify the message telegram,
and assemble incoming data into 8-bit bytes. The LFR does not wake the MCU unless a valid message is being received and a
data byte is ready to be read.
The LFR cycles between an off state, where everything is disabled, and an on state, where it listens for a carrier signal. The on
time is controlled by LFONTM[3:0] control bits in the LFCTL2 register. The time between the start of each sample on time is
controlled by LFSTM[3:0] control bits in the LFCTL2 register. Even lower duty cycles can be achieved by using the MCU to wake
once per second and maintain a software counter to delay for an arbitrarily long time before enabling the LFR to perform a series
of carrier detect cycles.
Within the LFR, circuits remain disabled until they are needed. When the LFR is listening for a carrier signal, only a 1-kHz clock
source, a portion of the input amplifier and a periodic auto-zero are running. After a carrier signal is detected, with high enough
amplitude, frequency and duration the LFRO oscillator is enabled so the LFR can begin to decode the incoming information.
The LFR module has a power up settling time of 2-LFO period before any active operations. In the ON/OFF cycle, those 2 ms
are hidden in the sampling time during the off time.