Analog to Digital (ATD) Module
MC1321x Reference Manual, Rev. 1.6
Freescale Semiconductor
20-1
Chapter 20
Analog to Digital (ATD) Module
20.1
Introduction
The ATD module is an analog-to-digital converter with a successive approximation register (SAR)
architecture with sample and hold.
20.1.1
Features
•
8-/10-bit resolution
•
14.0
μ
sec, 10-bit single conversion time at a conversion frequency of 2 MHz
•
Left-/right-justified result data
•
Left-justified Signed Data Mode
•
Conversion complete flag or conversion complete interrupt generation
•
Analog input multiplexer for up to eight analog input channels
•
Single or Continuous Conversion Mode
20.1.2
Modes of Operation
The ATD has two modes for low power
•
Stop Mode
•
Power-Down Mode
20.1.2.1
Stop Mode
When the MCU goes into Stop Mode, the MCU stops the clocks and the ATD analog circuitry is turned
off, placing the module into a low-power state . Once in Stop Mode, the ATD module aborts any single or
continuous conversion in progress. Upon exiting Stop Mode, no conversions occur and the registers have
their previous values. As long as the ATDPU bit is set prior to entering Stop Mode, the module is
reactivated coming out of stop.
20.1.2.2
Power Down Mode
Clearing the ATDPU bit in register ATD1C also places the ATD module in a low-power state. The ATD
conversion clock is disabled and the analog circuitry is turned off, placing the module in Power-Down
Mode. (This mode does not remove power to the ATD module.) Once in Power-Down Mode, the ATD
module aborts any conversion in progress. Upon setting the ATDPU bit, the module is reactivated. During
Power-Down Mode, the ATD registers are still accessible.
Note that the reset state of the ATDPU bit is zero. Therefore, the module is reset into the power-down state.
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