EVB-VF522R3 Platform User’s Guide, Rev. 0, 11/2014
Freescale Semiconductor, Inc.
17
Communication interfaces
10.2
QuadSPI memory
Three 256 Mb (32MB) Quad-I/O Serial Flash memory chips (e.g. S25FL256S by Spansion) are installed
on the EVB:
•
Flash A connected to Vybrid QSPI0_A interface
•
Flash B connected to Vybrid QSPI0_B interface
•
Flash C connected to Vybrid QSPI1_A interface
The memory type installed does not use the Vybrid DQSx signal lines, so these are disconnected by default
and Vybrid uses them as GPIOs.
Refer to the EVB-VF522R3 Schematic for details.
The following Vybrid features can be implemented on the EVB:
•
QuadSPI eXecute-In-Place (XiP) mode
•
Both Single (SDR) and Dual Data Rate (DDR)
•
Parallel QuadSPI operation in DDR mode
•
Using QuadSPI memory as a boot device by the internal Boot ROM
NOTE
The QuadSPI memory reset input is connected to output 4 of the peripheral
reset-control multiplexer (see
Section 7, “Peripheral reset-control
”). When reset, its outputs are in the high-impedance state, but,
thanks to a pull-down resistor on the reset line, the QuadSPI memory is reset
until the line is actively driven by the MCU via the peripheral reset-control
multiplexer.
10.3
SD card interface
The EVB features an SD card interface:
•
The Vybrid MCU device has two SD host controllers, SDHC0 & SDHC1.
•
SDHC1 is connected to a SD card slot.
•
SDHC0 is not used due to that some of its shared pins are already used for other functions.
•
SD card detection is via a request on pin 2 rather than a mechanical switch.
•
A SD card can be used as a boot device by the internal Vybrid Boot ROM.
11 Communication interfaces
11.1
CAN interface (P23, P24, P27)
The EVB features a high-speed CAN bus interface (see
•
On the digital side, connected to MCU CAN0,
•
On the media side: