DA70131-1/3E
III-3
1. Connection examples
1-1. An example of a circuit to interface a CPU to a center device
Four modes are available for connecting a CPU to the center device.
Shown below is an example for connecting a CPU to the IF0 and IF1 terminals.
Please note that the CPU shown in the connection example below is only a representative example. If the interface
is similar, CPUs other than the one shown below may be connected in this fashion. For details, see the hardware
instructions for the CPU you are using.
1-1-1. I/F mode 4 (IF1 = H, IF0 = H)
Note 1: When you use an interrupt controller, the CPU will output IORQ as an interrupt acknowledge signal that is
used to determine the interrupt vector. At this time, when this LSI's
____
CS terminal goes LOW, the LSI may
output a
____
WRQ signal and still not be able to capture the vector properly. Therefore, arrange the decoding
circuit so that it only functions when the
____
M1 signal is HIGH.
Note 2: Pull up terminals D8 to D15 to VDD externally (5 to 10 k-ohms).
Note 3: When you need to control by only 8 bytes, without using the complete address map, the address signals can
be handled as follows:
A3 to A15: Connect these lines to the decoding circuit and use them to create the
___
CS signal.
A0 to A2: Connect these lines to A0 to A2 on the center device.
Connect A3 to A8 on the center device to GND.
Z80 type CPU
G9001A
Decoding
circuit
CLK
IF1
____
CS
IF0
A0 to A8
____
INT
___
RD
___
WR
____
WRQ
D0 to D7
____
RST
CLK
System reset
VDD
___
M1
A15 to A9
A8 to A0
____
INT
_____
IORQ
___
RD
___
WR
_____
WAIT
D7 to D0
______
RESET
Содержание Motionnet G9001A
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