Nokia RM-57, Руководство по обслуживанию

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RAP3G core voltage (1.40V) is generated from Tahvo VCORE and I/O voltage (1.8V) is from Retu VIO. The core
voltage in sleep mode is lowered to 1.05V.
Retu EM ASIC
Retu EM ASIC includes the following functional blocks:
• Start up logic and reset control
• Charger detection
• Battery voltage monitoring
• 32.768kHz clock with external crystal
• Real time clock with external backup battery
• SIM card interface
• Stereo audio codecs and amplifiers
• A/D converter
• Regulators
• Vibra interface
• Digital interface (CBUS)
Tahvo EM ASIC
Tahvo EM ASIC includes the. following functional blocks:
• Core supply generation
• Charge control circuitry
• Level shifter and regulator for USB/FBUS
• Current gauge for battery current measuring
• External LED driver control interface
• Digital interface (CBUS)
Device memories
RAP3G memories NOR flash and SDRAM
Modem memory consists of 64 Mbit SDRAM and 64 Mbit NOR flash memories.
SDRAM is a dynamic memory for ISA SW.
NOR is used for ISA SW code and PMM data and CDSP SW code.
16-bit wide SDRAM interface consists of DDR SDRAM controller from ARM, DCDL/DLLs and wrapper logic. 32-bit
wide flash interface is implemented by using EMC module.
SDRAM core voltage (1.8V) is generated from Retu VDRAM and I/O voltage (1.8V) is from VIO. NOR flash uses VIO
for both core and I/O voltages.
Combo memory
The application memory of the device consists of NAND/DDR combo memory. Stacked DDR/NAND application
memory has 256 Mbit of DDR memory and 256 Mbit of flash memory. DDR DRAM memory is stacked above the
NAND flash.
OMAP includes a 16-bit dedicated memory interface called external memory interface fast (EMIFF). This is used
to support interface for DDR memory. OMAP1610 provides also NAND flash controller located on the shared
peripheral bus, providing support for 8-bit NAND flash. The interface requires an 8-bit address bus multiplexed
with 8-bit data bus and several control signals.
Core voltage for DDR is 1.8V, which is generated by discrete LDO (LP3999-1.8). 1.8V (VIO) is for DDR I/O voltage.
Both NAND core and I/O voltages are 1.8V generated by VIO.
RM-57/58
System Module
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