Gen-2 x1 PCI Express, providing a maximum nominal single-direction bandwidth of 500
MB/s.
•
A CompactPCI Express Type-2 Peripheral with x8, x4, or x1 PCI Express link to the host
PC through a PCI Express switch and Thunderbolt 3 controller.
•
A hybrid-compatible PXI Peripheral module modified by replacing the J2 connector with
an XJ4 connector installed in the upper eight rows of J2. Refer to the
PXI Express
Specification
for details. The PXI peripheral communicates through the backplane’s 32-
bit PCI bus.
•
A CompactPCI 32-bit peripheral on the backplane’s 32-bit PCI bus.
The hybrid peripheral slots provide full PXI Express functionality and 32-bit PXI functionality
except for PXI Local Bus. The hybrid peripheral slot connects to only PXI Local Bus 6 left
and right.
Figure 5. PXIe-1083 PCI Express Backplane Diagram
Port 5 Port 1
Port 7
Port 9
Po
rt 12
Po
rt 14
Po
rt 0
PCIe Switch
6
H
5
H
4
H
3
H
2
H
32-bit, 33 MHz PCI
Thunderbolt 3
Controller
(to Host)
PCIe-PCI
Bridge
(Upstream)
PXI Local Bus
The PXI backplane local bus is a daisy-chained bus that connects each peripheral slot with
adjacent peripheral slots to the left and right.
The backplane routes PXI Local Bus 6 between adjacent PXI slots. The left local bus 6 from
slot 2 and right local bus 6 from slot 6 are not routed anywhere.
The backplane routes PXI Local Bus between all slots. Local bus signals may range from
high-speed TTL signals to analog signals as high as 42 V.
Initialization software uses the configuration information specific to each adjacent peripheral
module to evaluate local bus compatibility.
8
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PXIe-1083 User Guide
