Chapter 3
Connecting the Signals
©
National Instruments Corporation
3-31
DAQPad-MIO-16XE-50 User Manual
Figure 3-19.
CONVERT* Output Signal Timing
The ADC switches to hold mode within 60 ns of the selected edge. This
hold-mode delay time is a function of temperature and does not vary from
one conversion to the next. Separate the CONVERT* pulses by at least one
conversion period.
The DAQPad-MIO-16XE-50 sample interval counter normally generates
the CONVERT* signal unless you select some external source. The counter
is started by the STARTSCAN signal and continues to count down and
reload itself until the scan is finished. It then reloads itself in readiness for
the next STARTSCAN pulse.
A/D conversions generated by either an internal or external CONVERT*
signal are inhibited unless they occur within a DAQ sequence. Scans
occurring within a DAQ sequence may be gated by either the hardware
(AIGATE) signal or software gate.
AIGATE Signal
Any PFI signal can externally input AIGATE, which is not available as an
output on the DAQPad-TB-52. The AIGATE signal can mask off scans in
a DAQ sequence. You can configure the PFI signal you select as the source
for the AIGATE signal in level-detection mode. You can configure the
polarity selection for the PFI signal for either active high or active low.
In the level-detection mode, if AIGATE is active the STARTSCAN signal
is masked off and no scans can occur.
The AIGATE signal can neither stop a scan in progress nor continue a
previously gated-off scan; in other words, once a scan has started, AIGATE
does not gate off conversions until the beginning of the next scan and,
conversely, if conversions are being gated off, AIGATE does not gate them
back on until the beginning of the next scan.
t
w
= 50 to 150 ns
t
w
CONVERT*