Peak 550 User’s Guide
BIOS Setup 4-
19
Chipset Features Setup Menu
Since the features in this section are related to the chipset in the CPU board and all are
optimized, you are not recommended to change the default settings in the setup table,
unless you know very detailed of the chipset features.
ROM PCI/ISA BIOS (2A5IHN09)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration
: Enable
CPU to PCI Burst Mem. WR
: Disabled
ISA Bus Clock Frequency
: PCICLK/4
L2 (WB) Tag Bit Length
: 8 bits
System BIOS Cacheable
: Enabled
SRAM Back-to-Back
: Enable
Video BIOS Cacheable
: Enabled
NA # Enable
: Enabled
Memory Hole at 15M-16M
: Disabled
Starting Point of Paging
: 1T
VGA Shared Memory Size
: 1MB
Refresh Cycle Time(us)
: 187.2
VGA Memory Clock (MHz)
: 55
RAS Pulse Width Refresh
: 6T
RAS Precharge Time
: 4T
RAS to CAS Delay
: 4T
CAS# Pulse Width (FP)
: 2T
CAS# Pulse Width (EDO)
: 1T
RAMW# Assertion Timing
: 3T
CAS Precharge Time(FP)
: 1T/2T
CAS Precharge Time (EDO)
: 1T/2T
Enhanced Memory Write
: Disabled
ESC: Quit
↑↓→←
: Select item
Read Prefetch Memory RD
: Enabled
F1 : Help PU/PD/+/-: Modify
CPU to PCI Post Write
: 3T
F5 : Old Values (Shift) F2: Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
Содержание Peak 550
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