NED CoaXpress XCM40160CXP, Руководство пользователя

Страница: 34 / 59

34
NED
XCM80160CXP_60160CXP_40160CXP UME-0022-0
2
5.4 Digital Processing flow in FPGA
The figure below shows the digital processing flow in the FPGA.
Video(10bit)
From Sensor
- x
White reference
multipl
Test Pattern
select
Black reference
substract
FPGA Processing block diagram
x
Video(8 or 10bit)
To CoaxPress
Driver
Digital Gain
-
Digital Offset
8 or 10bit
select
Output Block
select
In Test Pattern mode, Black /White reference and Digital Gain/Offset will be skiped.
Figure 5-4-1 FPGA Processing Block Diagram
5.5 Startup
When you power on the camera, the camera goes through a series of startup
procedures. During startup, the LED lights orange.
The startup procedure is as follows.
①
The camera initializes the hardware.
②
Reads out the latest camera settings from the flash memory. (User settings if any
or factory default settings)
③
Sets up the camera with the setting values from the flash memory.
When this sequence finishes, the camera is ready to capture and output images. In
order to output images, the Discovery procedure must be done from the frame
grabber board.