819
Chapter 18
AFCAN Controller
User’s Manual U16580EE3V1UD00
Figure 18-31:
Transmit history list
18.10.3 Automatic block transmission (ABT)
The automatic block transmission (ABT) function is used to transmit two or more data frames succes-
sively with no CPU interaction. The maximum number of transmit message buffers assigned to the ABT
function is eight (message buffer numbers 0 to 7).
By setting the OPMODE[2:0] bits of the CnCTRL register to 010B, “normal operation mode with auto-
matic block transmission function” (hereafter referred to as ABT mode) can be selected.
To issue an ABT transmission request, define the message buffers by software first. Set the MA0 bit (1)
in all the message buffers used for ABT, and define all the buffers as transmit message buffers by set-
ting the MA[2:0] bits to 000B. Be sure to set the same ID for the message buffers for ABT even when
that ID is being used for all the message buffers. To use two or more IDs, set the ID of each message
buffer by using the CnMIDLm and CnMIDHm registers. Set the CnMDLCm and CnMDATA0m to
CnMDATA7m registers before issuing a transmission request for the ABT function.
After initialization of message buffers for ABT is finished, the RDY bit needs to be set (1). In the ABT
mode, the TRQ bit does not have to be manipulated by software.
After the data for the ABT message buffers has been prepared, set the ABTTRG bit to 1. Automatic
block transmission is then started. When ABT is started, the TRQ bit in the first message buffer (mes-
sage buffer 0) is automatically set to 1. After transmission of the data of message buffer 0 is finished,
the TRQ bit of the next message buffer, message buffer 1, is set automatically. In this way, transmission
is executed successively.
A delay time can be inserted by program in the interval in which the transmission request (TRQ) is auto-
matically set while successive transmission is being executed. The delay time to be inserted is defined
by the CnGMABTD register. The unit of the delay time is DBT (data bit time). DBT depends on the set-
ting of the CnBRP and CnBTR registers.
Among transmit objects within the ABT-area, the priority of the transmission ID is not evaluated. The
data of message buffers 0 to 7 are sequentially transmitted. When transmission of the data frame from
message buffer 7 has been completed, the ABTTRG bit is automatically cleared to 0 and the ABT oper-
ation is finished.
If the RDY bit of an ABT message buffer is cleared during ABT, no data frame is transmitted from that
buffer, ABT is stopped, and the ABTTRG bit is cleared. After that, transmission can be resumed from
1
2
3
4
5
6
7
Tr
a
n
s
mit hi
s
tory li
s
t(THL)
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
Event:
- me
ssa
ge
bu
ffer
8
, 5, 6
a
nd 10 complete
s
tr
a
n
s
mi
ss
ion
- THL i
s
f
u
ll
- TOVF i
s
s
et
0
0
0
0
L
as
t o
u
t-me
ssa
ge
pointer(LOPT)
Me
ssa
ge
bu
ffer 7
Me
ssa
ge
bu
ffer 2
Me
ssa
ge
bu
ffer 9
Me
ssa
ge
bu
ffer 6
Tr
a
n
s
mit hi
s
tory li
s
t
get pointer(TGPT)
Tr
a
n
s
mit hi
s
tory li
s
t(THL)
Me
ssa
ge
bu
ffer 4
Me
ssa
ge
bu
ffer
3
Me
ssa
ge
bu
ffer 7
Tr
a
n
s
mit hi
s
tory li
s
t
get pointer(TGPT)
Tr
a
n
s
mit hi
s
tory li
s
t(THL)
Tr
a
n
s
mit hi
s
tory li
s
t
get pointer(TGPT)
L
as
t o
u
t-me
ssa
ge
pointer(LOPT)
TOVF = 1
LOPT i
s
b
locked
Tr
a
n
s
mit
hi
s
tory
li
s
t get
pointer
(TGPT)
Tr
a
n
s
mit hi
s
tory li
s
t(THL)
L
as
t o
u
t-me
ssa
ge
pointer(LOPT)
Me
ssa
ge
bu
ffer 5
Me
ssa
ge
bu
ffer
8
Me
ssa
ge
bu
ffer 4
Me
ssa
ge
bu
ffer
3
Me
ssa
ge
bu
ffer 7
Me
ssa
ge
bu
ffer 14
Me
ssa
ge
bu
ffer 5
Me
ssa
ge
bu
ffer
8
Me
ssa
ge
bu
ffer 4
Me
ssa
ge
bu
ffer
3
Me
ssa
ge
bu
ffer 7
Me
ssa
ge
bu
ffer 10
Me
ssa
ge
bu
ffer 6
Me
ssa
ge
bu
ffer 6
TOVF = 1
LOPT i
s
b
locked
Event:
- CPU confirm
s
TX completion
of me
ssa
ge
bu
ffer 6, 9
a
nd 2
- TX completion of me
ssa
ge
bu
ffer
3
a
nd 4
L
as
t o
u
t-
me
ssa
ge
pointer
(LOPT)
Event:
- me
ssa
ge
bu
ffer 11, 1
3
a
nd 14
complete
s
tr
a
n
s
mi
ss
ion.
- Overflow
s
it
ua
tion occ
u
r
s
.
TOVF = 1 define
s
th
a
t LOPT e
qua
l
s
TOPT - 1 while me
ssa
ge
bu
ffer n
u
m
b
er
s
tored to element indic
a
ted
b
y LOPT - 1.
Содержание V850E/PH2
Страница 6: ...6 Preface User s Manual U16580EE3V1UD00...
Страница 16: ...16 User s Manual U16580EE3V1UD00...
Страница 28: ...28 User s Manual U16580EE3V1UD00...
Страница 32: ...32 User s Manual U16580EE3V1UD00...
Страница 84: ...84 Chapter 2 Pin Functions User s Manual U16580EE3V1UD00 MEMO...
Страница 144: ...144 Chapter 3 CPU Functions User s Manual U16580EE3V1UD00 MEMO...
Страница 192: ...192 Chapter 5 Memory Access Control Function PD70F3187 only User s Manual U16580EE3V1UD00 MEMO...
Страница 312: ...312 Chapter 9 16 Bit Timer Event Counter P User s Manual U16580EE3V1UD00 MEMO...
Страница 534: ...534 Chapter 11 16 bit Timer Event Counter T User s Manual U16580EE3V1UD00...
Страница 969: ...969 Chapter 20 Port Functions User s Manual U16580EE3V1UD00 MEMO...
Страница 970: ...970 Chapter 20 Port Functions User s Manual U16580EE3V1UD00...
Страница 976: ...976 Chapter 22 Internal RAM Parity Check Function User s Manual U16580EE3V1UD00 MEMO...
Страница 984: ...984 Chapter 23 On Chip Debug Function OCD User s Manual U16580EE3V1UD00 MEMO...
Страница 1006: ...1006 Chapter 24 Flash Memory User s Manual U16580EE3V1UD00 MEMO...
Страница 1036: ...1036 Chapter 27 Recommended Soldering Conditions User s Manual U16580EE3V1UD00 MEMO...
Страница 1046: ...1046 Appendix A Index User s Manual U16580EE3V1UD00 MEMO...
Страница 1052: ...1052 User s Manual U16580EE3V1UD00...
Страница 1053: ......